level shifter
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Author(s):  
A. V. Mayakkannan ◽  
Selvakumar Rajendran ◽  
Srihari Kannan ◽  
Arvind Chakrapani ◽  
V. K. Shanmuganathan

Author(s):  
Li-Jie Huang ◽  
Deng-Fong Lu ◽  
Wen-Hao Fan ◽  
Chin Hsia
Keyword(s):  

Author(s):  
V.G. Rajendran ◽  
Jayalalitha S. ◽  
Adalarasu K. ◽  
Nirmalraj T.

Brain-Computer Interface (BCI) plays a major role in current technologies such as rehabilitation, control of devices, and various medical applications. BCI or brain-machine interface provides direct communication between a brain signal and an external device. In this paperwork, a detailed survey was carried out with the design of single-channel EEG system for various applications. Also, this paper mainly focused on the development of single-channel electroencephalography (EEG) signal acquisition system which includes a preamplifier, bandpass filter, post-amplifier and level shifter circuits. The design of the preamplifier and post-amplifier circuit was carried out by integrated circuits (IC) such as instrumentation amplifier IN128P and bandpass filter with the help of low power operational amplifier LM324. The developed single-channel acquisition board was tested by acquiring an electrooculogram (EOG) signal with closed and opened eye conditions. The acquired signal is displayed and stored in the computer with the help of the HBM-DAQ unit.


Author(s):  
N. Sai Kiran ◽  
N. Arun Vignesh ◽  
K. Sravani ◽  
Ch. Usha Kumari ◽  
S. Kanithan ◽  
...  

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Kumar Neeraj ◽  
Jitendra Kumar Das

PurposeHigh throughput and power efficient computing devices are highly essential in many autonomous system-based applications. Since the computational power keeps on increasing in recent years, it is necessary to develop energy efficient static RAM (SRAM) memories with high speed. Nowadays, Static Random-Access Memory cells are predominantly liable to soft errors due to the serious charge which is crucial to trouble a cell because of fewer noise margins, short supply voltages and lesser node capacitances.Design/methodology/approachPower efficient SRAM design is a major task for improving computing abilities of autonomous systems. In this research, instability is considered as a major issue present in the design of SRAM. Therefore, to eliminate soft errors and balance leakage instability problems, a signal noise margin (SNM) through the level shifter circuit is proposed.FindingsBias Temperature Instabilities (BTI) are considered as the primary technology for recently combined devices to reduce degradation. The proposed level shifter-based 6T SRAM achieves better results in terms of delay, power and SNM when compared with existing 6T devices and this 6T SRAM-BTI with 7 nm technology is also applicable for low power portable healthcare applications. In biomedical applications, Body Area Networks (BANs) require the power-efficient SRAM design to extend the battery life of BAN sensor nodes.Originality/valueThe proposed method focuses on high speed and power efficient SRAM design for smart ubiquitous sensors. The effect of BTI is almost eliminated in the proposed design.


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