2007 7th International Conference on ASIC
Latest Publications

TOTAL DOCUMENTS

356

(FIVE YEARS 0)

H-INDEX

7

(FIVE YEARS 0)

Published By IEEE

9781424411313, 9781424411320

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Design and realization of a system simulator

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415578 ◽

2007 ◽

Author(s):

Na Bai ◽

Fang Lu ◽

Jun Yang ◽

Longxing Shi

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Fractional-N phase locked loop design and applications

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415633 ◽

2007 ◽

Cited By ~ 5

Author(s):

Richard Gu ◽

Sridhar Ramaswamy

Keyword(s):

Phase Locked Loop ◽

Loop Design

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A novel oscillation-based BIST for ADCs

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415804 ◽

2007 ◽

Author(s):

Wang Yong-sheng ◽

Zhang Jian-ling ◽

Yu Ming-yan ◽

Xiao Li-yi

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A CMOS voltage reference without resistors for ultra-low power applications

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415683 ◽

2007 ◽

Cited By ~ 7

Author(s):

Han Wang ◽

Qing Ye

Keyword(s):

Low Power ◽

Voltage Reference ◽

Ultra Low Power ◽

Cmos Voltage Reference

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The design of a new spiral inductor balun used in RF/MW based on 0.13μm CMOS process

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415639 ◽

2007 ◽

Author(s):

Jie Wang ◽

Wenjun Zhang ◽

Ruinan Chang ◽

Zhiping Yu

Keyword(s):

Spiral Inductor ◽

Cmos Process

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Design and VLSI implementation of a security ASIP

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415768 ◽

2007 ◽

Cited By ~ 1

Author(s):

Ronghua Lu ◽

Xiaoyang Zen ◽

Jun Han ◽

Yehua Gu ◽

Lang Mai

Keyword(s):

Vlsi Implementation

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Low-power CMOS folding and interpolating ADC with a fully-folding technique

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415618 ◽

2007 ◽

Cited By ~ 1

Author(s):

Zhen Liu ◽

Yuan Wang ◽

Song Jia ◽

Lijiu Ji ◽

Xing Zhang

Keyword(s):

Low Power ◽

Low Power Cmos

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Study on Hybrid Switching Mechanism in Network on Chip

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415780 ◽

2007 ◽

Author(s):

Kun Wang ◽

Huaxi Gu ◽

Changshan Wang

Keyword(s):

Network On Chip ◽

Switching Mechanism ◽

On Chip ◽

Hybrid Switching

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Multi-level signaling for energy-efficient on-chip interconnects

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415572 ◽

2007 ◽

Author(s):

Fakhrul Zaman Rokhani ◽

Gerald E. Sobelman

Keyword(s):

Energy Efficient ◽

Multi Level ◽

On Chip

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VLSI implementation of an AES algorithm resistant to Differential Power Analysis attack

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415761 ◽

2007 ◽

Cited By ~ 2

Author(s):

Jia Zhao ◽

Jun Han ◽

Xiaoyang Zeng ◽

Jun Chen

Keyword(s):

Power Analysis ◽

Vlsi Implementation ◽

Differential Power Analysis ◽

Aes Algorithm ◽

Power Analysis Attack

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