Automatic generation of application-specific accelerators for FPGAs from python loop nests

2012 ◽  
Author(s):  
David Sheffield ◽  
Michael Anderson ◽  
Kurt Keutzer
Keyword(s):  
Automatic Generation ◽  
Loop Nests ◽  
Application Specific

“Multi-Circuit”: Automatic Generation of an Application Specific Configurable Core for Known Set of Application Circuits

2016 ◽  
Vol 25 (09) ◽  
pp. 1650102 ◽  
Author(s):  
Muhammad Mazher Iqbal ◽  
Husain Parvez ◽  
Muhammad Rashid
Keyword(s):  
Automatic Generation ◽  
Reconfigurable Hardware ◽  
System On Chip ◽  
Digital Systems ◽  
Fpga Design ◽  
Silicon Area ◽  
Reconfigurable Platform ◽  
On Chip ◽  
Application Specific ◽  
Dedicated Hardware

Many digital systems provide multiple but closely related functionalities, not all of them are required simultaneously. Dedicated hardware solution for each functionality will waste too much silicon area. This work presents automatic generation of a shared hardware solution for a set of functionalities which will execute only one functionality at a time. This shared hardware solution is termed as “Multi-Circuit”. A Multi-Circuit can be embedded as a configurable component in a System-on-Chip (SoC) design. Multi-Circuit is generated by initially mapping a given set of application functionalities on a common reconfigurable platform. Later on, all the unused logic and routing resources are efficiently removed from the reconfigurable hardware. Experiments reveal that Multi-Circuit is 18–42% smaller than the previously proposed technique named Application Specific Inflexible FPGA (ASIF). Multi-Circuit is 73–84% smaller than its corresponding FPGA design.

Automatic generation of application specific FPGA multicore accelerators

2014 ◽  
Author(s):  
Andreas Erik Hindborg ◽  
Pascal Schleuniger ◽  
Nicklas Bo Jense ◽  
Maxwell Walter ◽  
Laust Brock-Nannestad ◽  
...  
Keyword(s):  
Automatic Generation ◽  
Application Specific
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