Analysis and Design of a 5G Multi-Mode Power Amplifier using 130 nm CMOS technology

2021 ◽  
Author(s):  
Marwa Mansour ◽  
Abdelhalim Zekry ◽  
Mohammed K. Ali ◽  
Heba Shawkey
Keyword(s):  
Power Amplifier ◽  
Cmos Technology ◽  
Analysis And Design ◽  
Multi Mode

Analysis and Design of an Ultrabroadband Stacked Power Amplifier in CMOS Technology

2016 ◽  
Vol 63 (1) ◽  
pp. 49-53 ◽  
Author(s):  
Hai-Feng Wu ◽  
Qian-Fu Cheng ◽  
Xu-Guang Li ◽  
Hai-Peng Fu
Keyword(s):  
Power Amplifier ◽  
Cmos Technology ◽  
Analysis And Design

Analysis and Design Procedure of a mm-Wave Class-E Power Amplifier

2021 ◽  
pp. 105036
Author(s):  
Habib Ghasemizadeh ◽  
Abdolreza Nabavi ◽  
Member IEEE ◽  
Mohsen Haghighat
Keyword(s):  
Power Amplifier ◽  
Design Procedure ◽  
Analysis And Design ◽  
Class E

Fully Monolithic BiCMOS Reconfigurable Power Amplifier for Multi-Mode and Multi-Band Applications

2015 ◽  
Vol 63 (2) ◽  
pp. 614-624 ◽  
Author(s):  
Ming-Lung Lee ◽  
Chong-Yi Liou ◽  
Wei-Ting Tsai ◽  
Chun-Yu Lou ◽  
Hao-Lun Hsu ◽  
...  
Keyword(s):  
Power Amplifier ◽  
Multi Mode ◽  
Multi Band

An Efficient Mixed-Signal 2.4-GHz Polar Power Amplifier in 65-nm CMOS Technology

2011 ◽  
Vol 46 (8) ◽  
pp. 1796-1809 ◽  
Author(s):  
Debopriyo Chowdhury ◽  
Lu Ye ◽  
Elad Alon ◽  
Ali M. Niknejad
Keyword(s):  
Power Amplifier ◽  
Cmos Technology ◽  
Mixed Signal

scholarly journals A –5 dBm 400MHz OOK Transmitter for Wireless Medical Application

2014 ◽  
Vol 60 (2) ◽  
pp. 193-198
Author(s):  
M. Yousefi ◽  
D. Koozehkanani ◽  
H. Jangi ◽  
N. Nasirzadeh ◽  
J. Sobhi
Keyword(s):  
Energy Consumption ◽  
Power Amplifier ◽  
High Efficiency ◽  
Medical Application ◽  
Cmos Technology ◽  
High Energy ◽  
Data Rate ◽  
High Data Rate ◽  
Low Power Consumption ◽  
High Data

Abstract A 400 MHz high efficiency transmitter for wireless medical application is presented in this paper. Transmitter architecture with high-energy efficiencies is proposed to achieve high data rate with low power consumption. In the on-off keying transmitters, the oscillator and power amplifier are turned off when the transmitter sends 0 data. The proposed class-e power amplifier has high efficiency for low level output power. The proposed on-off keying transmitter consumes 1.52 mw at -5 dBm output by 40 Mbps data rate and energy consumption 38 pJ/bit. The proposed transmitter has been designed in 0.18μm CMOS technology.

A 31 GHz body-biased configurable power amplifier in 28 nm FD-SOI CMOS for 5 G applications

2020 ◽  
pp. 1-18
Author(s):  
Florent Torres ◽  
Eric Kerhervé ◽  
Andreia Cathelin ◽  
Magali De Matos
Keyword(s):  
Power Amplifier ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Technology ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Fully Depleted ◽  
Technology Roadmap ◽  
Wide Range ◽  
28 Nm ◽  
Soi Cmos

Abstract This paper presents a 31 GHz integrated power amplifier (PA) in 28 nm Fully Depleted Silicon-On-Insulator Complementary Metal Oxide Semiconductor (FD-SOI CMOS) technology and targeting SoC implementation for 5 G applications. Fine-grain wide range power control with more than 10 dB tuning range is enabled by body biasing feature while the design improves voltage standing wave ratio (VSWR) robustness, stability and reverse isolation by using optimized 90° hybrid couplers and capacitive neutralization on both stages. Maximum power gain of 32.6 dB, PAEmax of 25.5% and Psat of 17.9 dBm are measured while robustness to industrial temperature range and process spread is demonstrated. Temperature-induced performance variation compensation, as well as amplitude-to-phase modulation (AM-PM) optimization regarding output power back-off, are achieved through body-bias node. This PA exhibits an International Technology Roadmap for Semiconductors figure of merit (ITRS FOM) of 26 925, the highest reported around 30 GHz to authors' knowledge.

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