Design of Single-Event Tolerant Latches in 65nm CMOS Technology for Enhanced Scan Delay Testing

2017 Prognostics and System Health Management Conference (PHM-Harbin) ◽

10.1109/phm.2017.8079149 ◽

2017 ◽

Author(s):

Chunhua Qi ◽

Liyi Xiao ◽

Tianqi Wang ◽

Mingjiang Wang

Keyword(s):

Cmos Technology ◽

Delay Testing ◽

Single Event

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Single event upset induced by single event double transient and its well-structure dependency in 65-nm bulk CMOS technology

Science China Information Sciences ◽

10.1007/s11432-015-5471-y ◽

2016 ◽

Vol 59 (4) ◽

Cited By ~ 3

Author(s):

Pengcheng Huang ◽

Shuming Chen ◽

Jianjun Chen

Keyword(s):

Cmos Technology ◽

Single Event Upset ◽

Single Event

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Dependence of Temperature and Back-gate Bias on Single Event Upset Induced by Heavy Ion in a 0.2 μm DSOI CMOS Technology

IEEE Transactions on Nuclear Science ◽

10.1109/tns.2021.3094669 ◽

2021 ◽

pp. 1-1

Author(s):

Yuchong Wang ◽

Fanyu Liu ◽

Bo Li ◽

Binhong Li ◽

Yang Huang ◽

...

Keyword(s):

Cmos Technology ◽

Heavy Ion ◽

Gate Bias ◽

Single Event Upset ◽

Single Event ◽

Back Gate

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Angular dependency on heavy-ion-induced single-event multiple transients (SEMT) in 65 nm twin-well and triple-well CMOS technology

Microelectronics Reliability ◽

10.1016/j.microrel.2018.10.015 ◽

2018 ◽

Vol 91 ◽

pp. 278-282 ◽

Cited By ~ 1

Author(s):

Jizuo Zhang ◽

Jianjun Chen ◽

Pengcheng Huang ◽

Shouping Li ◽

Liang Fang

Keyword(s):

Cmos Technology ◽

Heavy Ion ◽

Single Event ◽

Angular Dependency

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Evaluating the Practicability of Error-Detection Circuit Exposed to Single-Event Upsets in 65 nm CMOS Technology

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) ◽

10.1109/icsict.2018.8565800 ◽

2018 ◽

Author(s):

Wei He ◽

Jia Wang ◽

Zhun Zhang ◽

Jianhua Wu ◽

Sheng Luo

Keyword(s):

Error Detection ◽

Cmos Technology ◽

Single Event ◽

Single Event Upsets ◽

Detection Circuit

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Research on the effect of single-event transient of an on-chip linear voltage regulator fabricated on 130 nm commercial CMOS technology

Microelectronics Reliability ◽

10.1016/j.microrel.2017.04.030 ◽

2017 ◽

Vol 73 ◽

pp. 116-121 ◽

Cited By ~ 1

Author(s):

QiFeng Zhao ◽

GuoQing Yang ◽

YongJie Sun ◽

PeiFu Yu ◽

JianJun Chen ◽

...

Keyword(s):

Cmos Technology ◽

Voltage Regulator ◽

Single Event ◽

Single Event Transient ◽

On Chip ◽

Linear Voltage

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Research on single event transient pulse quenching effect in 90 nm CMOS technology

Science China Technological Sciences ◽

10.1007/s11431-011-4579-6 ◽

2011 ◽

Vol 54 (11) ◽

pp. 3064-3069 ◽

Cited By ~ 14

Author(s):

JunRui Qin ◽

ShuMing Chen ◽

BiWei Liu ◽

JianJun Chen ◽

Bin Liang ◽

...

Keyword(s):

Cmos Technology ◽

Single Event ◽

Single Event Transient ◽

Quenching Effect

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Impacts of Proton Radiation on Heavy-Ion-Induced Single-Event Transients in 65-nm CMOS Technology

IEEE Transactions on Nuclear Science ◽

10.1109/tns.2018.2867590 ◽

2019 ◽

Vol 66 (1) ◽

pp. 177-183

Author(s):

Zhenyu Wu ◽

Shuming Chen ◽

Jianjun Chen ◽

Pengcheng Huang

Keyword(s):

Cmos Technology ◽

Heavy Ion ◽

Proton Radiation ◽

Single Event ◽

Single Event Transients

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Design and Analysis of Single-Event Tolerant Slave Latches for Enhanced Scan Delay Testing

IEEE Transactions on Device and Materials Reliability ◽

10.1109/tdmr.2013.2266543 ◽

2014 ◽

Vol 14 (1) ◽

pp. 333-343 ◽

Cited By ~ 8

Author(s):

Yang Lu ◽

Fabrizio Lombardi ◽

Salvatore Pontarelli ◽

Marco Ottavi

Keyword(s):

Delay Testing ◽

Single Event

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Single-Event Transient Modeling in a 65-nm Bulk CMOS Technology Based on Multi-Physical Approach and Electrical Simulations

IEEE Transactions on Nuclear Science ◽

10.1109/tns.2013.2287299 ◽

2013 ◽

Vol 60 (6) ◽

pp. 4421-4429 ◽

Cited By ~ 50

Author(s):

Guillaume Hubert ◽

Laurent Artola

Keyword(s):

Cmos Technology ◽

Single Event ◽

Single Event Transient ◽

Physical Approach ◽

Transient Modeling

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Single Event Effects Sensitivity of the Q Series Advanced CMOS Technology

2006 IEEE Radiation Effects Data Workshop ◽

10.1109/redw.2006.295483 ◽

2006 ◽

Author(s):

R. Koga ◽

J. George ◽

P. Yu ◽

S. Crain ◽

M. Zakrzewski ◽

...

Keyword(s):

Cmos Technology ◽

Single Event ◽

Single Event Effects

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Design of Single-Event Tolerant Latches in 65nm CMOS Technology for Enhanced Scan Delay Testing

Single event upset induced by single event double transient and its well-structure dependency in 65-nm bulk CMOS technology

Dependence of Temperature and Back-gate Bias on Single Event Upset Induced by Heavy Ion in a 0.2 μm DSOI CMOS Technology

Angular dependency on heavy-ion-induced single-event multiple transients (SEMT) in 65 nm twin-well and triple-well CMOS technology

Evaluating the Practicability of Error-Detection Circuit Exposed to Single-Event Upsets in 65 nm CMOS Technology

Research on the effect of single-event transient of an on-chip linear voltage regulator fabricated on 130 nm commercial CMOS technology

Research on single event transient pulse quenching effect in 90 nm CMOS technology

Impacts of Proton Radiation on Heavy-Ion-Induced Single-Event Transients in 65-nm CMOS Technology

Design and Analysis of Single-Event Tolerant Slave Latches for Enhanced Scan Delay Testing

Single-Event Transient Modeling in a 65-nm Bulk CMOS Technology Based on Multi-Physical Approach and Electrical Simulations

Single Event Effects Sensitivity of the Q Series Advanced CMOS Technology

Angular dependency on heavy-ion-induced single-event multiple transients (SEMT) in 65 nm twin-well and triple-well CMOS technology