Dynamic power optimization using look-ahead clock gating technique

2017 2nd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT) ◽

10.1109/rteict.2017.8256598 ◽

2017 ◽

Author(s):

Madhushree ◽

Niju Rajan

Keyword(s):

Power Optimization ◽

Clock Gating ◽

Dynamic Power ◽

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Dynamic power optimization of LFSR using clock gating

2017 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS) ◽

10.1109/iciiecs.2017.8275949 ◽

2017 ◽

Author(s):

K Madhushree ◽

Niju Rajan

Keyword(s):

Power Optimization ◽

Clock Gating ◽

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Novel Linear Feedback Shift Register with Look Ahead Clock Gating Technique for Dynamic Power Reduction in Built-In Self-Test

Journal of Nanoelectronics and Optoelectronics ◽

10.1166/jno.2016.1939 ◽

2016 ◽

Vol 11 (6) ◽

pp. 783-791

Author(s):

R. Manjith ◽

C. Muthukumari

Keyword(s):

Power Reduction ◽

Shift Register ◽

Linear Feedback Shift Register ◽

Linear Feedback ◽

Clock Gating ◽

Dynamic Power ◽

Feedback Shift Register ◽

Self Test ◽

Built In Self Test

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Power Optimization of Sequential Circuits Using Switching Activity Based Clock Gating

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e93.a.2472 ◽

2010 ◽

Vol E93-A (12) ◽

pp. 2472-2480 ◽

Author(s):

Xin MAN ◽

Takashi HORIYAMA ◽

Shinji KIMURA

Keyword(s):

Power Optimization ◽

Sequential Circuits ◽

Switching Activity ◽

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Dynamic power optimization for secondary wearable biosensors in e-healthcare leveraging cognitive WBSNs with imperfect spectrum sensing

Future Generation Computer Systems ◽

10.1016/j.future.2020.05.013 ◽

2020 ◽

Vol 112 ◽

pp. 67-92

Author(s):

Long Zhang ◽

Jinhua Hu ◽

Chao Guo ◽

Haitao Xu

Keyword(s):

Spectrum Sensing ◽

Power Optimization ◽

Dynamic Power ◽

Imperfect Spectrum Sensing

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Distributed Targets Tracking with Dynamic Power Optimization for Wireless Sensor Networks

Lecture Notes in Electrical Engineering - Informatics and Management Science IV ◽

10.1007/978-1-4471-4793-0_26 ◽

2012 ◽

pp. 221-229 ◽

Author(s):

Shuting Zhang ◽

Guojun Li ◽

Lan Xiao ◽

Linhong Wang ◽

Xiao-na Zhou

Keyword(s):

Wireless Sensor Networks ◽

Sensor Networks ◽

Power Optimization ◽

Wireless Sensor ◽

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Clock-tree power optimization based on RTL clock-gating

Proceedings of the 40th conference on Design automation - DAC '03 ◽

10.1145/775832.775989 ◽

2003 ◽

Author(s):

Monica Donno ◽

Alessandro Ivaldi ◽

Luca Benini ◽

Enrico Macii

Keyword(s):

Power Optimization ◽

Clock Gating ◽

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RTL dynamic power optimization for FPGAs

2008 51st Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.2008.4616899 ◽

2008 ◽

Author(s):

David Howland ◽

Russell Tessier

Keyword(s):

Power Optimization ◽

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Dynamic power reduction through clock gating technique for low power memory applications

2015 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT) ◽

10.1109/icecct.2015.7226204 ◽

2015 ◽

Author(s):

G. S. R. Srivatsava ◽

Pooran Singh ◽

Siddharth Gaggar ◽

Santosh Kumar Vishvakarma

Keyword(s):

Low Power ◽

Power Reduction ◽

Clock Gating ◽

Dynamic Power ◽

Memory Applications

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Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks

Proceedings European Design and Test Conference. ED & TC 97 ◽

10.1109/edtc.1997.582409 ◽

2002 ◽

Author(s):

L. Benini ◽

G. De Micheli ◽

E. Macii ◽

M. Poncino ◽

R. Scarsi

Keyword(s):

Power Optimization ◽

Clock Gating ◽

Symbolic Synthesis

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Clock gating for power optimization in ASIC design cycle theory & practice

Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08 ◽

10.1145/1393921.1394003 ◽

2008 ◽

Author(s):

Jairam S ◽

Madhusudan Rao ◽

Jithendra Srinivas ◽

Parimala Vishwanath ◽

Udayakumar H ◽

...

Keyword(s):

Power Optimization ◽

Clock Gating ◽

Asic Design ◽

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