Improved Off-Current and Subthreshold Slope in Aggressively Scaled Poly-Si TFTs With a Single Grain Boundary in the Channel

AbstractA short channel polycrystalline silicon thin film transistor (poly-Si TFT), which has single grain boundary in the center of channel, is reported. The reported poly-Si TFT employs lateral grain growth method through aluminum patterns, which acts as a selective beam mask and a lateral heat sink during the laser irradiation, on an amorphous silicon layer. The electrical characteristics of the proposed poly-Si TFT have been considerably improved due to grain boundary density lowered. The reported short channel poly-Si TFT with single grain boundary exhibits high mobility as 222 cm2/Vsec and large on/off current ratio exceeding 1 × 108.

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Grain Boundary Atomic Structures in SrTiO3 and BaTiO3

Materials Science Forum ◽

10.4028/www.scientific.net/msf.558-559.851 ◽

2007 ◽

Vol 558-559 ◽

pp. 851-856 ◽

Cited By ~ 1

Author(s):

Takahisa Yamamoto ◽

Teruyasu Mizoguchi ◽

S.Y. Choi ◽

Yukio Sato ◽

Naoya Shibata ◽

...

Keyword(s):

Grain Boundary ◽

Grain Boundaries ◽

Annealing Temperature ◽

Unit Length ◽

Rate Dependency ◽

Atomic Structures ◽

Current Voltage ◽

Single Grain ◽

Current Voltage Characteristics ◽

Theoretical Results

SrTiO3 bicrystals with various types of grain boundaries were prepared by joining two single crystals at high temperature. By using the bicrystals, we examined their current-voltage characteristics across single grain boundaries from a viewpoint of point defect segregation in the vicinity of the grain boundaries. Current-voltage property in SrTiO3 bicrystals was confirmed to show a cooling rate dependency from annealing temperature, indicating that cation vacancies accumulate due to grain boundary oxidation. The theoretical results obtained by ab-initio calculation clearly showed that the formation energy of Sr vacancies is the lowest comparing with Ti and O vacancies in oxidized atomosphere. The formation of a double Schottky barrier (DSB) in n-type SrTiO3 is considered to be closely related to the accumulation of the charged Sr vacancies. Meanwhile, by using three types of low angle boundaries, the excess charges related to one grain boundary dislocation par unit length was estimated. In this study, we summarized our results obtained in our group.

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Analysis of Logic Inverter Based on Polycrystalline Silicon with Single Grain Boundary

Journal of Nanoscience and Nanotechnology ◽

10.1166/jnn.2020.18769 ◽

2020 ◽

Vol 20 (11) ◽

pp. 6616-6621

Author(s):

Hye Jin Mun ◽

Min Su Cho ◽

Jun Hyeok Jung ◽

Won Douk Jang ◽

Sang Ho Lee ◽

...

Keyword(s):

Grain Boundary ◽

Polycrystalline Silicon ◽

Complementary Metal Oxide Semiconductor ◽

Deep Trap ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Shallow Trap ◽

Nanoscale Cmos ◽

Dc Characteristics ◽

Single Grain

In this paper, we demonstrate the characteristics of a complementary metal-oxide-semiconductor (CMOS) logic inverter based on a polycrystalline-silicon (poly-Si) layer with a single grain boundary (GB). The proposed nanoscale CMOS logic inverter had been constructed on a poly-Si layer with a GB including four kind of traps at the center of the channel. The simulation variables are the acceptor-like deep trap (ADT), the donor-like deep trap (DDT), the acceptor-like shallow trap (AST) and the donor-like shallow trap (DST). The ADT and the DDT much stronger influences on the DC characteristics of the devices than the AST and the DST. The variation of voltage-transfer-curve (VTC) for CMOS devices directly affected the CMOS logic inverter with different traps.

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Noise characteristics of single grain boundary junction DC SQUIDs in Y1Ba2Cu3O7−δ films

Physica C Superconductivity ◽

10.1016/0921-4534(90)90329-d ◽

1990 ◽

Vol 170 (3-4) ◽

pp. 315-318 ◽

Cited By ~ 25

Author(s):

R. Gross ◽

P. Chaudhari ◽

M. Kawasaki ◽

M. Ketchen ◽

A. Gupta

Keyword(s):

Grain Boundary ◽

Noise Characteristics ◽

Single Grain

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Location Control of Laterally Columnar Si Grains by Dual-Beam Excimer-Laser Melting of Si Thin-Film

MRS Proceedings ◽

10.1557/proc-621-q9.4.1 ◽

2000 ◽

Vol 621 ◽

Cited By ~ 7

Author(s):

Ryoichi Ishihara

Keyword(s):

Thin Film ◽

Grain Boundary ◽

Heat Source ◽

Grain Boundaries ◽

Excimer Laser ◽

Laser Melting ◽

Dual Beam ◽

Single Grain ◽

Free Area ◽

Si Thin Film

ABSTRACTThe offset of the underlying TiW is introduced in the island of Si, SiO2 and TiW on glass. During the dual-beam excimer-irradiation to the Si and the TiW, the offset in TiW acts as an extra heat source, which melts completely the Si film near the edge, whereas the Si inside is partially melted. The laterally columnar Si grains with a length of 3.2 μm were grown from the inside of the island towards the edge. By changing the shape of the edge, the direction of the solidification of the grain was successfully controlled in such a way that the all grain-boundaries are directed towards the edge and a single grain expands. The grain-boundary-free area as large as 4 μm × 3 μm was obtained at a predetermined position of glass.

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