Large Temperature Dependence of Coulomb Blockade Oscillations in Room-Temperature-Operating Silicon Single-Hole Transistor

2006 ◽  
Vol 45 (8A) ◽  
pp. 6157-6161 ◽  
Author(s):  
Masaharu Kobayashi ◽  
Masumi Saitoh ◽  
Toshiro Hiramoto
2018 ◽  
Vol 27 (14) ◽  
pp. 1850217 ◽  
Author(s):  
Mostafa Miralaie ◽  
Ali Mir

In this paper, in order to analyze the performance of single-electron transistor (SET)-based analog-to-digital converter (ADC) circuits at room temperature, first, the quantum Coulomb blockade regime is explained and based on it we calculate and discuss the inherent Coulomb oscillation characteristics of room-temperature-operating SETs (or, in other words, ultra-small SETs). Then, to explain the performance of SET-based ADC structures, we explore the sensitivity of converter section of these structures to the inherent periodic oscillation characteristics. By simulating two different temperatures of 100[Formula: see text]K and 300[Formula: see text]K, we demonstrate that for proper performance of converter section of the SET-based ADCs, SETs must have inherent Coulomb oscillations with the same and high peak-to-valley current ratio (PVCR) and equal Coulomb peak spacing (i.e., equal [Formula: see text]. The Coulomb oscillation characteristics of the room-temperature-operating silicon SET show the Coulomb oscillations with unequal PVCRs and unequal Coulomb peak spacings (i.e., unequal [Formula: see text]. As a result, it can be seen that the room-temperature-operating SET-based ADCs never have a suitable output.


2009 ◽  
Vol 94 (5) ◽  
pp. 053112 ◽  
Author(s):  
Yasuhide Ohno ◽  
Yoshihiro Asai ◽  
Kenzo Maehashi ◽  
Koichi Inoue ◽  
Kazuhiko Matsumoto

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