scholarly journals Design of a low-power compact CMOS variable gain amplifier for modern RF receivers

2020 ◽  
Vol 9 (1) ◽  
pp. 87-93
Author(s):  
M. J. Alam ◽  
Mohammad Arif Sobhan Bhuiyan ◽  
Md Torikul Islam Badal ◽  
Mamun Bin Ibne Reaz ◽  
Noorfazila Kamal

The demand for portability has speeded up the design of low-power electronic communication devices. Variable gain amplifier (VGA) is one of the most vulnerable elements of every modern receiver for the proper baseband processing of the signal. CMOS VGAs are generally suffered from low bandwidth and small gain range. In this research, a two-stage class AB VGA, each stage comprising of a direct transconductance amplifier and a linear transimpedance amplifier, is designed in Silterra 0.13-μm CMOS utilizing Mentor Graphics environment. The post-layout simulation results reveal that the VGA design achieves the widest bandwidth of 200 MHz and high gain range from -33 to 32 dB. The VGA dissipates only 2mW from a single 1.2 V DC supply. The core chip area of the VGA is also only 0.026 mm2 which is also the lowest compared to recent researches. Such a VGA will be a very useful module for all modern communication devices.

2018 ◽  
Vol 27 (09) ◽  
pp. 1850135 ◽  
Author(s):  
Sawssen Lahiani ◽  
Samir Ben Salem ◽  
Houda Daoud ◽  
Mourad Loulou

This paper presents the design of a new Digital Variable Gain Amplifier cell (DVGA). The proposed circuit based on transconductance, gm, amplifier and a transconductance amplifier is analyzed and designed for a cognitive radio receiver. The variable-gain amplifier (VGA) proposed consists of a digital control block, an auxiliary pair to retain a constant current density, and offers a gain-independent bandwidth (BW). A novel cell structure is designed for high gain, high BW, low power consumption and low Noise Figure (NF). The Heuristic Method is used to optimize the proposed circuit performance for high gain, low noise and low power consumption. This circuit is implemented and simulated using device-level description of TSMC 0.18[Formula: see text][Formula: see text]m CMOS process. Simulation results show that the DVGA can provide a gain variation range of 54[Formula: see text]dB (from 54[Formula: see text]dB to 0[Formula: see text]dB) with a 3[Formula: see text]dB BW over more than 110[Formula: see text]MHz. The circuit consumes the maximum power of 0.65[Formula: see text]mW from a 1.8[Formula: see text]V supply.


2012 ◽  
Vol 59 (10) ◽  
pp. 2176-2185 ◽  
Author(s):  
Zhiming Chen ◽  
Yuanjin Zheng ◽  
Foo Chung Choong ◽  
Minkyu Je

Author(s):  
A. Jeevan Kumar ◽  
K. Lokesh Krishna ◽  
K. Abhinav Viswateja ◽  
K. Gopi ◽  
S. Mohan Rao ◽  
...  

2004 ◽  
Vol 39 (7) ◽  
pp. 1213-1216 ◽  
Author(s):  
Y. Fujimoto ◽  
H. Tani ◽  
M. Maruyama ◽  
H. Akada ◽  
H. Ogawa ◽  
...  

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