Tool Integration for Automated Synthesis of Distributed Embedded Controllers

Controller design and their software implementations are usually done in isolated design spaces using respective COTS design tools. However, this separation of concerns can lead to long debugging and integration phases. This is because assumptions made about the implementation platform during the design phase—e.g., related to timing—might not hold in practice, thereby leading to unacceptable control performance. In order to address this, several control/architecture co-design techniques have been proposed in the literature. However, their adoption in practice has been hampered by the lack of design flows using commercial tools. To the best of our knowledge, this is the first article that implements such a co-design method using commercially available design tools in an automotive setting, with the aim of minimally disrupting existing design flows practiced in the industry. The goal of such co-design is to jointly determine controller and platform parameters in order to avoid any design-implementation gap , thereby minimizing implementation time testing and debugging. Our setting involves distributed implementations of control algorithms on automotive electronic control units ( ECUs ) communicating via a FlexRay bus. The co-design and the associated toolchain Co-Flex jointly determines controller and FlexRay parameters (that impact signal delays) in order to optimize specified design metrics. Co-Flex seamlessly integrates the modeling and analysis of control systems in MATLAB/Simulink with platform modeling and configuration in SIMTOOLS/SIMTARGET that is used for configuring FlexRay bus parameters. It automates the generation of multiple Pareto-optimal design options with respect to the quality of control and the resource usage, that an engineer can choose from. In this article, we outline a step-by-step software development process based on Co-Flex tools for distributed control applications. While our exposition is automotive specific, this design flow can easily be extended to other domains.

Permchecker: a toolchain for debugging memory managers with typestate

Dynamic memory managers are a crucial component of almost every modern software system. In addition to implementing efficient allocation and reclamation, memory managers provide the essential abstraction of memory as distinct objects, which underpins the properties of memory safety and type safety. Bugs in memory managers, while not common, are extremely hard to diagnose and fix. One reason is that their implementations often involve tricky pointer calculations, raw memory manipulation, and complex memory state invariants. While these properties are often documented, they are not specified in any precise, machine-checkable form. A second reason is that memory manager bugs can break the client application in bizarre ways that do not immediately implicate the memory manager at all. A third reason is that existing tools for debugging memory errors, such as Memcheck, cannot help because they rely on correct allocation and deallocation information to work. In this paper we present Permchecker, a tool designed specifically to detect and diagnose bugs in memory managers. The key idea in Permchecker is to make the expected structure of the heap explicit by associating typestates with each piece of memory. Typestate captures elements of both type (e.g., page, block, or cell) and state (e.g., allocated, free, or forwarded). Memory manager developers annotate their implementation with information about the expected typestates of memory and how heap operations change those typestates. At runtime, our system tracks the typestates and ensures that each memory access is consistent with the expected typestates. This technique detects errors quickly, before they corrupt the application or the memory manager itself, and it often provides accurate information about the reason for the error. The implementation of Permchecker uses a combination of compile-time annotation and instrumentation, and dynamic binary instrumentation (DBI). Because the overhead of DBI is fairly high, Permchecker is suitable for a testing and debugging setting and not for deployment. It works on a wide variety of existing systems, including explicit malloc/free memory managers and garbage collectors, such as those found in JikesRVM and OpenJDK. Since bugs in these systems are not numerous, we developed a testing methodology in which we automatically inject bugs into the code using bug patterns derived from real bugs. This technique allows us to test Permchecker on hundreds or thousands of buggy variants of the code. We find that Permchecker effectively detects and localizes errors in the vast majority of cases; without it, these bugs result in strange, incorrect behaviors usually long after the actual error occurs.

Teaching IIoT through Hands-on Activities

This chapter describes a hands-on educational approach to teach Industrial Internet of Things (IIoT), including activities like problem analysis, programming, testing and debugging. Students are given autonomy to propose and evaluate different solutions, using adequate tools and following best practices. In parallel, key competencies like team management, project planning, costing and time scheduling, are imbibed in students to prepare them to become deployable automation engineers. To illustrate the proposed approach, we elaborate on the experience gained from teaching an elective course to undergraduate engineering students, in terms of learning outcomes, methodology, assessment and feedback. This course was centered on the Node Red platform (based on Node.js), using hardware devices like Arduino Uno, Nano and Raspberry Pi. Sensors commonly used and protocols like Modbus RTU/TCP, OPC UA, MQTT are discussed in the framework of common industrial applications.

Editorial for Vol.28, No.3

This third issue (September 2020) of CIT. Journal of Computing and Information Technology comprises four papers from the regular section, tackling topics from the areas of software testing and debugging, machine learning, natural language processing and business management processing.

Everything You Always Wanted to Know About Embedded Trace

Decades of advances in computer architecture, software-intensive applications and system integration have created significant challenges for embedded systems designers and test engineers. Intrusive software instrumentation and breakpoint-based debugging are often viewed as the primary options for observing operational system internals. This narrow sight creates complicated test flows and convoluted debugging procedures. Modern embedded computing systems offer Embedded Trace as the technological answer to the encountered observability conundrum. Although an integral part of virtually all modern processors, it is frequently overlooked. Its technical foundations are little known to application engineers, test engineers, and project managers. This article explains Embedded Trace as an essential technology in the testing and debugging toolbox. It highlights its capabilities, limitations and opportunities.