Highly Accurate Pose Estimation as a Reference for Autonomous Vehicles in Near-Range Scenarios

To validate the accuracy and reliability of onboard sensors for object detection and localization for driver assistance, as well as autonomous driving applications under realistic conditions (indoors and outdoors), a novel tracking system is presented. This tracking system is developed to determine the position and orientation of a slow-moving vehicle during test maneuvers within a reference environment (e.g., car during parking maneuvers), independent of the onboard sensors. One requirement is a 6 degree of freedom (DoF) pose with position uncertainty below 5 mm (3σ), orientation uncertainty below 0.3° (3σ), at a frequency higher than 20 Hz, and with a latency smaller than 500 ms. To compare the results from the reference system with the vehicle’s onboard system, synchronization via a Precision Time Protocol (PTP) and system interoperability to a robot operating system (ROS) are achieved. The developed system combines motion capture cameras mounted in a 360° panorama view setup on the vehicle, measuring retroreflective markers distributed over the test site with known coordinates, while robotic total stations measure a prism on the vehicle. A point cloud of the test site serves as a digital twin of the environment, in which the movement of the vehicle is visualized. The results have shown that the fused measurements of these sensors complement each other, so that the accuracy requirements for the 6 DoF pose can be met while allowing a flexible installation in different environments.

A 4.32-ps precision Time-to-Digital Convertor using multisampling wave union method on a 28-nm FPGA

In this paper, a fully implemented field programmable gate array (FPGA) based time-to-digital converter (TDC) using multisampling wave union method (MSWU) is proposed to get higher measurement precision with lower resource utilization. Different from the previously published works based on wave union methods, an inverter-chain-based wave launcher is introduced to generate more low-jitter edges in the same operation range. Meanwhile, a new de-bubble solution combining with offline bin alignment and online bin sorting is applied to eliminate severe bubbles in FPGAs of advanced manufacturing technologies. The proposed TDCs are verified on a Virtex-7 (28 nm) of FPGA development board VC707. According to test results, the average measurement precision and mean resolution reach 4.32 ps and 0.82 ps, respectively with [-0.98;3.43] LSB DNL and [-6.06;34.1] LSB INL. A complete TDC channel only uses 831 D-type flip-flops (DFFs), 1305 look-up tables (LUTs) and 6 block random access memories (BRAMs) of 36k bits.

White Rabbit Multi-Point Time Distribution Network

A nanosecond-accuracy, scalable, multi-point time- and frequency dissemination has been set up in an existing DWDM optical fiber network spanning approximately 200 km, using the White Rabbit (WR) Precision Time Protocol (PTP). Presented novelties in this paper are: a performance study of 5 cascaded WR switches allowing a wide fan-out; reference delay compensation ensuring that the time received by the user is synchronized with the reference timescale within a few nanosecond offset; experiments with a master clock priority algorithm for redundant operation and experimental results of hold-over performance.

White Rabbit Multi-Point Time Distribution Network

A nanosecond-accuracy, scalable, multi-point time- and frequency dissemination has been set up in an existing DWDM optical fiber network spanning approximately 200 km, using the White Rabbit (WR) Precision Time Protocol (PTP). Presented novelties in this paper are: a performance study of 5 cascaded WR switches allowing a wide fan-out; reference delay compensation ensuring that the time received by the user is synchronized with the reference timescale within a few nanosecond offset; experiments with a master clock priority algorithm for redundant operation and experimental results of hold-over performance.

The Design of an IEEE 1588 End-to-End Transparent Ethernet Switch

<p>In measurement and control systems there is often a need to synchronise distributed clocks. Traditionally, synchronisation has been achieved using a dedicated medium to convey time information, typically using the IRIG-B serial protocol. The precision time protocol (IEEE 1588) has been designed as an improvement to current methods of synchronisation within a distributed network of devices. IEEE 1588 is a message based protocol that can be implemented across packet based networks including, but not limited to, Ethernet. Standard Ethernet switches introduce a variable delay to packets that inhibits path delay measurements. Transparent switches have been introduced to measure and adjust for packet delay, thus removing the negative effects that these variations cause. This thesis describes the hardware and firmware design of an IEEE 1588 transparent end-to-end Ethernet switch for Tekron International Ltd based in Lower Hutt, New Zealand. This switch has the ability to monitor all Ethernet traffic, identify IEEE 1588 timing packets, measure the delay that these packets experience while passing through the switch, and account for this delay by adjusting a time-interval field of the packet as it is leaving the switch. This process takes place at the operational speed of the port, and without introducing significant delay. Time-interval measurements can be made using a high-precision timestamp unit with a resolution of 1 ns. The total jitter introduced by this measurement process is just 4.5 ns through a single switch.</p>

The Design of an IEEE 1588 End-to-End Transparent Ethernet Switch

<p>In measurement and control systems there is often a need to synchronise distributed clocks. Traditionally, synchronisation has been achieved using a dedicated medium to convey time information, typically using the IRIG-B serial protocol. The precision time protocol (IEEE 1588) has been designed as an improvement to current methods of synchronisation within a distributed network of devices. IEEE 1588 is a message based protocol that can be implemented across packet based networks including, but not limited to, Ethernet. Standard Ethernet switches introduce a variable delay to packets that inhibits path delay measurements. Transparent switches have been introduced to measure and adjust for packet delay, thus removing the negative effects that these variations cause. This thesis describes the hardware and firmware design of an IEEE 1588 transparent end-to-end Ethernet switch for Tekron International Ltd based in Lower Hutt, New Zealand. This switch has the ability to monitor all Ethernet traffic, identify IEEE 1588 timing packets, measure the delay that these packets experience while passing through the switch, and account for this delay by adjusting a time-interval field of the packet as it is leaving the switch. This process takes place at the operational speed of the port, and without introducing significant delay. Time-interval measurements can be made using a high-precision timestamp unit with a resolution of 1 ns. The total jitter introduced by this measurement process is just 4.5 ns through a single switch.</p>

Sub-nanosecond synchronization implementation in pure Xilinx Kintex-7 FPGA

White Rabbit (WR) provides high-performance synchronization with sub-nanosecond accuracy and picoseconds precision, and it has been included in the new High Accuracy Default PTP Profile in the IEEE 1588-2019. As an open-source project, WR Precision Time Protocol (WR-PTP) core has been implemented in different FPGA platforms with dedicated clock circuits. This paper presents a novel approach to achieve the WR function in Xilinx Kintex-7 FPGA depending on the on-chip resource. This approach could achieve sub-nanosecond accuracy and tens of picoseconds precision, simplifying WR devices' hardware design and making it possible to port the WR PTP core to many mature hardware platforms.