Analytical models for inter-layer tunneling in two-dimensional materials

Analytical formula of the transmission function of the inter-layer intra-band tunneling is derived for coupled narrow two-dimensional materials. Analytical models of the intra-band tunneling conductance G, the transmission function of the inter-layer band-to-band tunneling, and the maximum band-to-band tunneling current Imax, are also obtained. G and Imax are shown to exhibit different characteristics depending on the channel length.

Overlapped Gate-Source/Drain H-shaped TFET: Proposal, Design and Linearity Analysis

In this paper, the proposed design of H-shaped TFET has been discussed. This design is providing a high Ion/Ioff ratio with better Ion. HfO2 is used for better tunneling current. With this device, Different parameters such as unit parameter, analogue parameter, and linearity parameter have been studied and investigated the output of the H-TFET. As unit parameters, the electric field, electric potential, energy band diagram, and non-local band-to-band tunneling rate (BTBT) have all been observed. Second and third-order harmonics distortion (HD2, HD3), third-order current intercept point (IIP3), third-order intermodulation distortions (IMD3), and second and third-order voltage intercept point (VIP2, VIP3) are evaluated as linearity parameters that characterize the device's distortions and linearity. We obtained Ion\({\text{=1.6×}10}^{-4}\) A/µm, Ioff=2.1\({\text{×}10}^{-19}\) A/µm, Ion /Ioff=7.6\({\text{×}10}^{14}\),threshold voltage Vt=0.3449 V. © 2017 Elsevier Inc. All rights reserved.

Leakage Mitigation in NW FET using Negative Schottky Junction Drain and its Process Variation Analysis

In this work, a Schottky junction on the drain side employing low workfunction (WF) metal is proposed as a method to suppress the OFF-state leakage in nanowire (NW) field-effect transistor (FET). Instead of a highly n+ doped drain, low WF metal with negative electron Schottky-barrier height (SBH) as a drain minimizes the lateral band-to-band tunneling (L-BTBT) considerably. L-BTBT is the movement of carriers (holes) from the drain conduction band (CB) into the channel valence band (VB) during the OFF-state. Impact of varying WF at channel-drain junction on the device characteristics is studied. It is observed that SBH60 eV is required to mitigate L-BTBT compared to the conventionally-doped and junctionless (JL) NW counterpart. Furthermore, unlike L-BTBT, leakage in NW Schottky-drain (SD) comprises of holes tunneling through the SB from the metal drain into the channel and termed as the lateral SB tunneling (L-SBT). In contrast to JL NW FET, the process variation immunity (varying channel doping, NCh and NW diameter, dNW ) and the ON-state current of the proposed device is not compromised at the expense of lower OFF-state LSBT. Instead, the device is less susceptible to process variations and retains the ON-state performance of the NW MOSFET. For a ±20% change in NCh, ∆IOF F /IOF F of 7% compared to 97% in NW JL FET is observed.

Effect of Ge Mole Fraction on Performance of Underlapped Gate-All-Around SiGe-Source Tunneling Field-Effect Transistors

In this paper, we propose the design optimization of underlapped Si1–xGex-source tunneling field-effect transistors (TFETs) with a gate-all-around structure. The band-to-band tunneling rates, tunneling barrier widths, I–V transfer characteristics, threshold voltages, on/off current ratios, and subthreshold swings (SSs) were analyzed by varying the Ge mole fraction of the Si1–xGex source using a commercial device simulator. In particular, a Si0.2Ge0.8-source TFET among our proposed TFETs exhibits an on/off current ratio of approximately 1013, and SS of 27.4 mV/dec.

Performance Analysis of TFET and VDSTFET for Low Power Application using the Work Function Engineering

We report a design of TFET which is quite different from conventional TFET. The structure of VTFET is similar to MOSFET but the conducting mechanism is completely different. Vertical TFET is designed perpendicular to the horizontal plane. The switching and carrier transportation mechanism of VTFET is based on the mechanism of the band to band tunneling through a potential barrier and vertical TFET is based on tunneling perpendicular to the device rather than a mechanism like thermionic emission unlike in MOSFET. We have designed a model for the two-dimension structure of V-TFET which consists of the dual-source and single drain. The channel among the drain and gate region is extraordinarily thin. We have plotted the transfer characteristics of V-TFET according to device parameters using TCAD. The comparison of VTFET with DSVTFET is done by using Silvaco TCAD and the effect of source doping, and work function on transfer characteristics of the device is examined by using silvaco TCAD simulations. The proposed device produces a low-off current.