DC characterization of advanced fine-filamentary MgB2 superconducting wires.

MgB2 wires with 114, 192 and 342 filaments of size 14-19 µm manufactured by HyperTech Research, Inc. have been subjected to low temperature DC measurements. R(T), I-V characteristics, critical currents and stress and strain tolerances of these wires differing by filament architecture and filament size sheathed by resistive CuNi alloys were measured and compared with the literature data. It was found that these fine-filamentary wires have high engineering current densities not reduced by twisting up to 10 mm, sufficient strain tolerances and therefore are promising for future applications where minimised AC losses are required due resistive sheaths, thin MgB2 filaments and short twist pitches.

Technology agnostic frequency characterization methodology for memristors

Over the past decade, memristors have been extensively studied for a number of applications, almost exclusively with DC characterization techniques. Studies of memristors in AC circuits are sparse, with only a few examples found in the literature, and characterization methods with an AC input are also sparingly used. However, publications concerning the usage of memristors in this working regime are currently on the rise. Here we propose a "technology agnostic" methodology for memristor testing in certain frequency bands. A measurement process is initially proposed, with specific instructions on sample preparation, followed by an equipment calibration and measurement protocol. This article is structured in a way which aims to facilitate the usage of any available measurement equipment and it can be applied on any type of memristive technology. The second half of this work is centered around the representation of data received from following this process. Bode plot and Nyquist plot representations are considered and the information received from them is evaluated. Finally, examples of expected behaviors are given, characterizing simulated scenarios which represent different internal device models and different switching behaviors, such as capacitive or inductive switching. This study aims at providing a cohesive way for memristor characterization, to be used as a good starting point for frequency applications, and for understanding physical processes inside the devices, by streamlining the measuring process and providing a frame in which data representation and comparison will be facilitated.

Investigation of the Impact of Neutron Irradiation on SiC Power MOSFETs lifetime by Reliability Tests

High temperature reverse-bias (HTRB), High temperature gate-bias (HTGB) tests and electrical DC characterization were performed on planar-SiC power MOSFETs which survived to accelerated neutron irradiation tests carried out at ChipIr-ISIS (Didcot, UK) facility, with terrestrial neutrons. The neutron test campaigns on the SiC power MOSFETs (manufactered by ST) were conducted on the same wafer lot devices by STMicroelectronics and Airbus, with different neutron tester systems. HTGB and HTRB tests, which characterise gate-oxide integrity and junction robustness, show no difference between the non irradiated devices and those which survived to the neutron irradiation tests, with neutron fluence up to 2× 1011 (n/cm2). Electrical characterization performed pre and post-irradiation on different part number of power devices (Si, SiC MOSFETs and IGBTs) which survived to neutron irradiation tests does not show alteration of the data-sheet electrical parameters due to neutron interaction with the device.

Nanoprobe Characterization of Soft SRAM bit Fails in Advanced Technologies

Nanoprobing is one of the key characterization techniques for soft defect localization in SRAM. DC transistor performance metrics could be used to identify the root cause of the fail mode. One such case report where nanoprobing was applied to a wafer impacted by significant SRAM yield loss is presented in this paper where standard FIB cross-section on hard fail sites and top down delayered inspection did not reveal any obvious defects. The authors performed nanoprobing DC characterization measurements followed by capacitance-voltage (CV) measurements. Two probe CV measurement was then performed between the gate and drain of the device with source and bulk floating. The authors identified valuable process marginality at the gate to lightly doped drain overlap region. Physical characterization on an inline split wafer identified residual deposits on the BL contacts potentially blocking the implant. Enhanced cleans for resist removal was implemented as a fix for the fail mode.