2016 3rd International Conference on Devices, Circuits and Systems (ICDCS)
Latest Publications

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Published By IEEE

9781509023097

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Sine linear-phase-offset difference method: A novel approach for sine ROM compression

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570618 ◽

2016 ◽

Author(s):

M. C. Parameshwara ◽

H. C. Srinivasaiah

Keyword(s):

Difference Method ◽

Linear Phase ◽

Phase Offset ◽

Novel Approach

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Design and implementation of Configurable Logic Block of an FPGA using quantum dot cellular automata

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570620 ◽

2016 ◽

Author(s):

D. Gracia Nirmala Rani ◽

C. Mathumitha ◽

R. Priyadharshini ◽

S. Rajaram

Keyword(s):

Cellular Automata ◽

Quantum Dot ◽

Quantum Dot Cellular Automata ◽

Design And Implementation ◽

Logic Block

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A pattern recognition approach for identification of transducer-structure debonding using Lamb waves

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570611 ◽

2016 ◽

Author(s):

P Durai Arun ◽

C. N. Sathyanarayana ◽

S. Raja ◽

V P S Naidu

Keyword(s):

Pattern Recognition ◽

Lamb Waves ◽

Pattern Recognition Approach

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Impact of high K layer material on Analog/RF performance of forward and reversed Graded channel Gate Stack DG-MOSFETs

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570633 ◽

2016 ◽

Author(s):

Sanjit Kumar Swain ◽

Sarosij Adak ◽

Arka Dutta ◽

Godwin Raj ◽

Chandan Kumar Sarkar

Keyword(s):

Gate Stack ◽

Layer Material ◽

High K ◽

Channel Gate ◽

Rf Performance

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Silicon neuron-analog CMOS VLSI implementation and analysis at 180nm

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570617 ◽

2016 ◽

Cited By ~ 3

Author(s):

Sushma Srivastava ◽

S. S. Rathod

Keyword(s):

Vlsi Implementation ◽

Silicon Neuron ◽

Analog Cmos ◽

Cmos Vlsi

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Analytical model of gate underlap Double Gate Junctionless MOSFET as a bio-sensor

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570649 ◽

2016 ◽

Author(s):

Ajay ◽

Rakhi Narang ◽

Manoj Saxena ◽

Mridula Gupta

Keyword(s):

Analytical Model ◽

Double Gate ◽

Gate Underlap

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[Title page]

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570654 ◽

2016 ◽

Keyword(s):

Title Page

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An adaptive localization error minimization approach for wireless sensor network

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570586 ◽

2016 ◽

Author(s):

Sudha H. Thimmaiah ◽

G. Mahadevan

Keyword(s):

Wireless Sensor Network ◽

Sensor Network ◽

Wireless Sensor ◽

Error Minimization ◽

Localization Error ◽

Minimization Approach

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Design of static random access memory using QCA technology

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570625 ◽

2016 ◽

Author(s):

D. Gracia Nirmala Rani ◽

M. Saranya ◽

T. Sivashankari ◽

N. Meenakshi ◽

R. Meena ◽

...

Keyword(s):

Random Access ◽

Random Access Memory ◽

Static Random Access Memory ◽

Access Memory

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A comparative study of analog/RF performance: Symmetric and asymmetric underlap gate stack DG-MOSFETs

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS) ◽

10.1109/icdcsyst.2016.7570646 ◽

2016 ◽

Cited By ~ 1

Author(s):

Arpan Dasgupta ◽

Rahul Das ◽

Arka Dutta ◽

Atanu Kundu ◽

Chandan K. Sarkar

Keyword(s):

Comparative Study ◽

Gate Stack ◽

Rf Performance

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2016 3rd International Conference on Devices, Circuits and Systems (ICDCS)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Sine linear-phase-offset difference method: A novel approach for sine ROM compression

Design and implementation of Configurable Logic Block of an FPGA using quantum dot cellular automata

A pattern recognition approach for identification of transducer-structure debonding using Lamb waves

Impact of high K layer material on Analog/RF performance of forward and reversed Graded channel Gate Stack DG-MOSFETs

Silicon neuron-analog CMOS VLSI implementation and analysis at 180nm

Analytical model of gate underlap Double Gate Junctionless MOSFET as a bio-sensor

[Title page]

An adaptive localization error minimization approach for wireless sensor network

Design of static random access memory using QCA technology

A comparative study of analog/RF performance: Symmetric and asymmetric underlap gate stack DG-MOSFETs

2016 3rd International Conference on Devices, Circuits and Systems (ICDCS)
Latest Publications