In-process control of silicide formation during rapid thermal processing

1993 ◽  
Vol 63 (1-4) ◽  
pp. 131-134 ◽  
Author(s):  
J.-M. Dilhac ◽  
C. Ganibal ◽  
N. Nolhier ◽  
P.B. Moynagh ◽  
C.P. Chew ◽  
...  
Keyword(s):  
Process Control ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Silicide Formation

Ni Silicide Formation on Polycrystalline SiGe and SiGeC Layers

2002 ◽  
Vol 745 ◽  
Author(s):  
Erik Haralson ◽  
Tobias Jarmar ◽  
Johan Seger ◽  
Henry H. Radamson ◽  
Shi-Li Zhang ◽  
...  
Keyword(s):  
Thin Film ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Lateral Diffusion ◽  
Lateral Growth ◽  
Silicide Formation ◽  
Diffusion Couples ◽  
Planar Configuration ◽  
20 Nm

ABSTRACTThe reactions of Ni with polycrystalline Si, Si0.82Ge0.18 and Si0.818Ge0.18C0.002 films in two different configurations during rapid thermal processing were studied. For the usually studied planar configuration with 20 nm thick Ni on 130–290 nm thick Si1-x-yGexCy, NiSi1-xGex(C) forms at 450°C on either Si0.82Ge0.18 or Si0.818Ge0.18C0.002, comparable to NiSi formed on Si. However, the agglomeration of NiSi1-xGex(C) on Si0.818Ge0.18C0.002 occurs at 625°C, about 50°C higher than that of NiSi1-xGex on Si0.82Ge0.18. For thin-film lateral diffusion couples, a 200-nm thick Ni film was in contact with 80–130 nm thick Si1-x-yGexCy through 1–10 μm sized contact openings in a 170 nm thick SiO2 isolation. While the Ni3Si phase was formed for both the Si0.82Ge0.18 and Si0.818Ge0.18C0.002 samples, the presence of 0.2 at.% C caused a slightly slower lateral growth.

Commercial RTP-A SEMATECH Perspective

1996 ◽  
Vol 429 ◽  
Author(s):  
Tony Speranza ◽  
Terry Riley ◽  
Arun Nanda ◽  
Burt Fowler ◽  
Kenneth Torres ◽  
...  
Keyword(s):  
Process Control ◽  
Thermal Processing ◽  
Semiconductor Manufacturing ◽  
Rapid Thermal Processing ◽  
Component Technology ◽  
Tool Development ◽  
Productivity Improvement ◽  
The Past ◽  
Vertical Furnace ◽  
Cluster Tool

AbstractThis paper discusses various commercial aspects of Rapid Thermal Processing (RTP). It provides an overview of SEMATECH's efforts to improve the manufacturing viability of RTP. Over the past several years SEMATECH, a U.S. Government/Industry consortium, has identified thermal equipment and processing needs relating to semiconductor manufacturing. It has aggressively pursued solutions to these needs through specific equipment projects. These projects include: RTP Installed Base Productivity Improvement, 0.25um RTP Tool Development, and RTP Modeling and Component Technology. Also discussed are several thermal projects which focus on the performance of more traditional tools. A comparison between RTP and a vertical furnace with model based process control and a small batch fast ramp furnace is made. A brief discussion of an RTP gate stack cluster tool project is followed by a review of future thermal processing needs, including 300mm.

A parametric study of titanium silicide formation by rapid thermal processing

1996 ◽  
Vol 11 (2) ◽  
pp. 412-421 ◽  
Author(s):  
A. V. Amorsolo ◽  
P. D. Funkenbusch ◽  
A. M. Kadin
Keyword(s):  
Sheet Resistance ◽  
Parametric Study ◽  
Thermal Processing ◽  
Annealing Temperature ◽  
Rapid Thermal Processing ◽  
Titanium Silicide ◽  
Wet Etching ◽  
Silicide Formation ◽  
Temperature Variations ◽  
Sputter Etching

A parametric study of titanium silicide formation by rapid thermal processing was conducted to determine the effects of annealing temperature (650 °C, 750 °C), annealing time (30 s, 60 s), wet etching (no HF dip, with HF dip), sputter etching (no sputter etch, with sputter etch), and annealing ambient (Ar, N2) on the completeness of conversion of 60 nm Ti on (111)-Si to C54–TiSi2 based on sheet resistance and the uniformity of the sheet resistance measurements across the entire wafer. Statistical analysis of the results showed that temperature, annealing ambient, and sputter etching had the greatest influence. Increasing the temperature and using argon gas instead of nitrogen promoted conversion of the film to C54–TiSi2. On the other hand, sputter etching retarded it. The results also indicated significant interactions among these factors. The best uniformity in sheet resistance was obtained by annealing at 750 °C without sputter etching. The different sheet resistance profiles showed gradients that were consistent with expected profile behaviors, arising from temperature variations across the wafer due to the effect of a flowing cold gas and the effects of the wafer edge and flats.

The Control and Impact of Processing Ambient During RTP

1998 ◽  
Vol 514 ◽  
Author(s):  
Karen Maex ◽  
Eiichi Kondoh ◽  
Anne Lauwers ◽  
Muriel DePotter ◽  
Joris Prost
Keyword(s):  
Thermal Processing ◽  
Thermal Process ◽  
Rapid Thermal Processing ◽  
Process Window ◽  
Temperature Uniformity ◽  
Silicide Formation ◽  
Temperature Variations ◽  
Set Up ◽  
Interconnect Technology

ABSTRACTThe introduction of rapid thermal processing for silicide formation has triggered a lot of research to temperature uniformity and reproducibility in RTP systems. From the other side there has been the demand to make the process itself as robust as possible for temperature variations. Indeed the way the module is set up can open or close the thermal process window for silicidation. In addition to the temperature, the ambient control is to be taken into account. Although gasses are specified to a low level of contaminants, the RTP step needs to be optimized for optimal contaminant reduction. Besides, the process wafer itself can be a source of contamination. In this paper an overview will be given of the role of temperature and ambient during RTP on the silicidation processes. The effect of the wafer on ambient purity will be highlighted. It will be shown that the latter can also have an impact on other process steps in the interconnect technology.

Kinetics of platinum silicide formation during rapid thermal processing

1992 ◽  
Vol 72 (5) ◽  
pp. 1833-1836 ◽  
Author(s):  
A. K. Pant ◽  
S. P. Murarka ◽  
C. Shepard ◽  
W. Lanford
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Silicide Formation ◽  
Platinum Silicide ◽  
Kinetics Of

In-Situ Fabrication and Process Control Techniques in Rapid Thermal Processing

1991 ◽  
Vol 224 ◽  
Author(s):  
Mehrdad M. Moslehi ◽  
John Kuehne ◽  
Richard Yeakley ◽  
Lino Velo ◽  
Habib Najm ◽  
...  
Keyword(s):  
Process Control ◽  
Thermal Processing ◽  
Polycrystalline Silicon ◽  
High Performance ◽  
Rapid Thermal Processing ◽  
Control Techniques ◽  
In Situ Fabrication ◽  
Concurrent Use ◽  
Process Uniformity

AbstractAdvanced rapid thermal processing (RTP) equipment and sensors have been developed for in-situ fabrication of semiconductor devices. High-performance multi-zone lamp modules have been applied to various processes including rapid thermal oxidation (RTO), chemicalvapor deposition (CVD) of tungsten and amorphous/polycrystalline silicon, silicide formation, as well as high-temperature rapid thermal annealing (RTA). Concurrent use of multizone lamps and multi-point temperature sensors allows real-time wafer temperature control and process uniformity optimization. Specific experimental results will be presented on the multi-zone lamp modules, in-situ process control sensors, and single-wafer fabrication processes.

Rapid Thermal Processing Requirements for 0.35-µm IC Technologies and Beyond

1994 ◽  
Vol 342 ◽  
Author(s):  
Mehrdad M. Moslehi
Keyword(s):  
Process Control ◽  
Design Process ◽  
Thermal Processing ◽  
State Of The Art ◽  
Rapid Thermal Processing ◽  
Chemical Vapor ◽  
Unit Process ◽  
The Past ◽  
Cmos Ic ◽  
Manufacturing Science

ABSTRACTThis paper will present an overview of rapid thermal processing (RTP) technologies for fastcycle-time IC production. RTP has experienced significant advances in equipment design, process control capabilities, and unit process applications over the past eight years. The Microelectronics Manufacturing Science and Technology (MMST) program at TI successfully demonstrated CMOS IC production in a single-wafer factory with all-RTP thermal fabrication for various anneals, oxidations, and chemical-vapor depositions. The use of RTP in conjunction with other single-wafer processes enabled 0.35 µm IC fabrication with a 3-day cycle time. Selected RTP equipment, sensor, and process control developments will be reviewed. The RTP applications and requirements for state-of-the-art and future IC technologies will be described.

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