Variability of Threshold Voltage Induced by Work-Function Fluctuation and Random Dopant Fluctuation on Gate-All-Around Nanowire nMOSFETs

2019 ◽  
Author(s):  
Wen-Li Sung ◽  
Min-Hui Chuang ◽  
Yiming Li
Keyword(s):  
Work Function ◽  
Threshold Voltage ◽  
Random Dopant Fluctuation ◽  
Function Fluctuation ◽  
Random Dopant

Effect of Back Bias on Variability in Intrinsic Channel SOI MOSFETs

2011 ◽  
Vol 470 ◽  
pp. 214-217
Author(s):  
Toshiro Hiramoto ◽  
Takuya Saraya ◽  
Chi Ho Lee
Keyword(s):  
Bias Voltage ◽  
Threshold Voltage ◽  
Three Dimensional ◽  
Device Simulation ◽  
Fully Depleted ◽  
Random Dopant Fluctuation ◽  
Buried Oxide ◽  
Interface Inversion ◽  
Random Dopant

The threshold voltage (Vth) variability in fully depleted SOI MOSFETs with intrinsic channel and ultrathin buried oxide under back bias voltage (Vbs) is extensively investigated by three dimensional device simulation. It is found that the Vth variability increases only slightly by applying negative Vbs by the effect of random dopant fluctuation (RDF) in the substrate, while the Vth variability is severely degraded by applying positive Vbs by the effect of the back interface inversion. As a result, there is a certain value of Vbs around 0 V where the Vth variability is minimized.

Random Dopant Fluctuation-Induced Threshold Voltage Variation-Immune Ge FinFET With Metal–Interlayer–Semiconductor Source/Drain

2016 ◽  
Vol 63 (11) ◽  
pp. 4167-4172 ◽  
Author(s):  
Changho Shin ◽  
Jeong-Kyu Kim ◽  
Gwang-Sik Kim ◽  
Hyunjae Lee ◽  
Changhwan Shin ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Random Dopant Fluctuation ◽  
Voltage Variation ◽  
Random Dopant

scholarly journals Impact of Process-Induced Variations on Negative Capacitance Junctionless Nanowire FET

Electronics ◽  
2021 ◽  
Vol 10 (16) ◽  
pp. 1899
Author(s):  
Yejoo Choi ◽  
Jinwoong Lee ◽  
Jaehyuk Lim ◽  
Seungjun Moon ◽  
Changhwan Shin
Keyword(s):  
Work Function ◽  
Device Performance ◽  
Negative Capacitance ◽  
Line Edge Roughness ◽  
Random Dopant Fluctuation ◽  
Edge Roughness ◽  
The Impact ◽  
Random Dopant

In this study, the impact of the negative capacitance (NC) effect on process-induced variations, such as work function variation (WFV), random dopant fluctuation (RDF), and line edge roughness (LER), was investigated and compared to those of the baseline junctionless nanowire FET (JL-NWFET) in both linear (Vds = 0.05 V) and saturation (Vds = 0.5 V) modes. Sentaurus TCAD and MATLAB were used for the simulation of the baseline JL-NWFET and negative capacitance JL-NWFET (NC-JL-NWFET). Owing to the NC effect, the NC-JL-NWFET showed less variation in terms of device performance, such as σ[Vt], σ[SS], σ[Ion/Ioff], σ[Vt]/µ[Vt], σ[SS]/µ[SS], and σ[Ion/Ioff]/µ[Ion/Ioff], and enhanced device performance, which implies that the NC effect can successfully control the variation-induced degradation.

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