Novel Discrete Components Based Speed Controller for Induction Motor

2016 ◽  
Vol 7 (4) ◽  
pp. 1075
Author(s):  
Hussain Attia ◽  
Ali Sagafinia
Keyword(s):  
Induction Motor ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Low Cost ◽  
Digital Signal ◽  
Speed Control ◽  
Electronic System ◽  
Voltage Controlled Oscillator ◽  
Electronic Design

This paper presents an electronic design based on general purpose discrete components for speed control of a single phase induction motor drive. The MOSFETs inverter switching is controlled using Sampled Sinusoidal Pulse Width Modulation (SPWM) techniques with V/F method based on Voltage Controlled Oscillator (VCO). The load power is also controlled by a novel design to produce a suitable SPWM pulse. The proposed electronic system has ability to control the output frequency with flexible setting of lower limit to less than 1 Hz and to higher frequency limits to 55 Hz. Moreover, the proposed controller able to control the value of load voltage to frequency ratio, which plays a major parameter in the function of IM speed control. Furthermore, the designed system is characterized by easy manufacturing and maintenance, high speed response, low cost, and does not need to program steps as compared to other systems based on Microcontroller and digital signal processor (DSP) units. The complete proposed electronic design is made by the software of NI Multisim version 11.0 and all the internal sub-designs are shown in this paper. Simulation results show the effectiveness of electronic design for a promising of a high performance IM PWM drive.

An Approach to Motion Control Applications Based on Advanced Programmable Devices

2012 ◽  
Vol 49 (3) ◽  
pp. 243-259 ◽  
Author(s):  
Juvenal Rodríguez-Reséndiz ◽  
Fortino Mendoza-Mondragón ◽  
Roberto A. Gómez-Loenzo ◽  
M. Agustín Martínez-Hernández ◽  
Victor H. Mucino
Keyword(s):  
Motion Control ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Engineering Students ◽  
Low Cost ◽  
Digital Signal ◽  
Hybrid Architecture ◽  
Servo Drive ◽  
Control Applications

In this article a methodology for constructing a simple servo loop for motion control applications which is suitable for educational applications is presented. The entire hardware implementation is demonstrated, focusing on a microcontroller-based (μC) servo amplifier and a field programmable gate array-digital signal processor (FPGA-DSP) motion controller. A novel hybrid architecture-based digital stage is featured providing a low-cost servo drive and a high performance controller, which can be used as a basis for an industrial application. Communication between the computer and the controller is exploited in this project in order to perform a simultaneous adaptive servo tuning. The USB protocol has been put into operation in the user front-end because a high speed sampling frequency is required for the PC to acquire position feedback signals. A software interface is developed using educational software, enabling features not only limited to a motion profile but also the supervisory control and data acquisition (SCADA) topology of the system. A classical proportional-integral-derivative controller (PID) is programmed on a DSP in order to ensure a proper tracking of the reference at both low and high speeds in a d.c. motor. Furthermore, certain blocks are embedded on an FPGA. As a result, three of the most important technologies in signal processing are featured, permitting engineering students to understand several concepts covered in theoretical courses.

scholarly journals A Review of Self-Coherent Optical Transceivers: Fundamental Issues, Recent Advances, and Research Directions

2021 ◽  
Vol 11 (16) ◽  
pp. 7554
Author(s):  
Isiaka Alimi ◽  
Romil Patel ◽  
Nuno Silva ◽  
Chuanbowen Sun ◽  
Honglin Ji ◽  
...  
Keyword(s):  
High Speed ◽  
High Performance ◽  
Low Cost ◽  
Dynamic Environment ◽  
Digital Signal ◽  
Research Directions ◽  
Recent Advances ◽  
Heterogeneous Nature ◽  
Signal Processing Algorithms ◽  
Processing Algorithms

This paper reviews recent progress on different high-speed optical short- and medium-reach transmission systems. Furthermore, a comprehensive tutorial on high-performance, low-cost, and advanced optical transceiver (TRx) paradigms is presented. In this context, recent advances in high-performance digital signal processing algorithms and innovative optoelectronic components are extensively discussed. Moreover, based on the growing increase in the dynamic environment and the heterogeneous nature of different applications and services to be supported by the systems, we discuss the reconfigurable and sliceable TRxs that can be employed. The associated technical challenges of various system algorithms are reviewed, and we proffer viable solutions to address them.

scholarly journals Decimation of Delta-Sigma-Modulated Signals Using a Low-Cost Microcontroller

2021 ◽  
Author(s):  
Markeljan Fishta ◽  
Franco Fiori
Keyword(s):  
Digital Signal Processor ◽  
High Speed ◽  
Low Cost ◽  
Digital Signal ◽  
Experimental Tests ◽  
General Purpose ◽  
Data Conversion ◽  
Clock Frequency ◽  
Main Challenge ◽  
Modulated Signals

Abstract$$\varDelta \varSigma $$ Δ Σ analog-to-digital converters (ADCs) are largely used in sensor acquisition applications. In the last few years, standalone $$\varDelta \varSigma $$ Δ Σ modulators have become increasingly available as off-the-shelf parts. To build a complete ADC, a standalone modulator has to be paired with some advanced elaboration unit, such as a field programmable gate array (FPGA) or a digital signal processor (DSP), which is needed for the implementation of the decimation filter. This work investigates the use of low-cost, general-purpose microcontrollers for the decimation of $$\varDelta \varSigma $$ Δ Σ -modulated signals. The main challenge is given by the clock frequency of the modulator, which can be in the range of a few $$\hbox {MHz}$$ MHz . The proposed technique deals with this limitation by employing two serial peripheral interface (SPI) modules in a time-interleaved configuration. This approach allows for continuous acquisition and elaboration of relatively high-speed, digital signals. The technique has been applied to a case study, and a data conversion system has been practically realized. The performance of the proposed filter is compared to that of a digital filter, present on board a commercial microcontroller, and the results of experimental tests are provided.

scholarly journals Development of a High-Speed Digitizer to Time Resolve Nanosecond Fluorescence Pulses

2012 ◽  
Vol 10 (2) ◽  
Author(s):  
E. Moreno-García ◽  
R. Galicia-Mejía ◽  
D. Jiménez-Olarte ◽  
J. M. de la Rosa Vázquez ◽  
S. Stolik-Isakina
Keyword(s):  
Time Domain ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Input Pulse ◽  
Control Program ◽  
Sampling Technique ◽  
Digital Signal ◽  
Time Resolved ◽  
The Time Domain

The development of a high-speed digitizer system to measure time-domain voltage pulses in nanoseconds range is presented in this work. The digitizer design includes a high performance digital signal processor, a high-bandwidth analog-to-digital converter of flash-type, a set of delay lines, and a computer to achieve the time-domain measurements. A program running on the processor applies a time-equivalent sampling technique to acquire the input pulse. The processor communicates with the computer via a serial port RS-232 to receive commands and to transmit data. A control program written in LabVIEW 7.1 starts an acquisition routine in the processor. The program reads data from processor point by point in each occurrence of the signal, and plots each point to recover the time-resolved input pulse after n occurrences. The developed prototype is applied to measure fluorescence pulses from a homemade spectrometer. For this application, the LabVIEW program was improved to control the spectrometer, and to register and plot time-resolved fluorescence pulses produced by a substance. The developed digitizer has 750 MHz of analog input bandwidth, and it is able to resolve 2 ns rise-time pulses with 150 ps of resolution and a temporal error of 2.6 percent.

scholarly journals Development of a High-Performance, FPGA-Based Virtual Anemometer for Model-Based MPPT of Wind Generators

Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 83
Author(s):  
Giuseppe La Tona ◽  
Massimiliano Luna ◽  
Maria Carmela Di Piazza ◽  
Marcello Pucci ◽  
Angelo Accetta
Keyword(s):  
Wind Speed ◽  
Digital Signal Processor ◽  
High Performance ◽  
Low Cost ◽  
Digital Signal ◽  
Energy Yield ◽  
Model Based ◽  
Wind Generators ◽  
Point Tracking ◽  
Volume Weight

Model-based maximum power point tracking (MPPT) of wind generators (WGs) eliminates dead times and increases energy yield with respect to iterative MPPT techniques. However, it requires the measurement of wind speed. Under this premise, this paper describes the implementation of a high-performance virtual anemometer on a field programmable gate array (FPGA) platform. Said anemometer is based on a growing neural gas artificial neural network that learns and inverts the mechanical characteristics of the wind turbine, estimating wind speed. The use of this device in place of a conventional anemometer to perform model-based MPPT of WGs leads to higher reliability, reduced volume/weight, and lower cost. The device was conceived as a coprocessor with a slave serial peripheral interface (SPI) to communicate with the main microprocessor/digital signal processor (DSP), on which the control system of the WG was implemented. The best compromise between resource occupation and speed was achieved through suitable hardware optimizations. The resulting design is able to exchange data up to a 100 kHz rate; thus, it is suitable for high-performance control of WGs. The device was implemented on a low-cost FPGA, and its validation was performed using input profiles that were experimentally acquired during the operation of two different WGs.

The Research and Design of Image Processing System Based on FPGA and DSP

2014 ◽  
Vol 886 ◽  
pp. 556-559 ◽  
Author(s):  
Su Hua Chen ◽  
Zhi Meng Shu ◽  
Xu Fang
Keyword(s):  
Image Processing ◽  
Embedded System ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Processing System ◽  
Image Data ◽  
Digital Signal ◽  
System A ◽  
High Efficient

In order to improve high performance and low power of image processing embedded system, A high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor in this paper. In the whole system, A novel data transmission structure with a dual-port RAM which is divided into two halves, is applied to buff the high-speed real-time image data by Ping-pong technique. Because all work in the system is divided between the FPGA and DSP in the form of the pipelined, it is 25% higher than the processing system based on the single DSP in performance.

scholarly journals Low Complexity DSP for High Speed Optical Access Networking

2021 ◽  
Vol 11 (8) ◽  
pp. 3406
Author(s):  
Jinlong Wei ◽  
Cedric Lam ◽  
Ji Zhou ◽  
Ivan Aldaya ◽  
Elias Giacoumidis ◽  
...  
Keyword(s):  
High Speed ◽  
High Performance ◽  
Noise Suppression ◽  
Low Cost ◽  
Optical Power ◽  
Digital Signal ◽  
Single Mode ◽  
Pulse Amplitude ◽  
Power Budget ◽  
Optical Access

A novel low-cost and energy-efficient approach for reaching 40 Gb/s signals is proposed for cost-sensitive optical access networks. Our proposed design is constituted of an innovative low-complex high-performance digital signal processing (DSP) architecture for pulse amplitude modulation (PAM-4), reuses existing commercial cost-effective 10-G components and eliminates the need of a power-hungry radio frequency (RF) component in the transmitter. Using a multi-functional 17-tap reconfigurable adaptive Volterra-based nonlinear equalizer with noise suppression, significant improvement in receiver optical power sensitivity is achieved. Results show that over 30 km of single-mode fiber (SMF) a link power budget of 33 dB is feasible at a bit-error-rate (BER) threshold of 10−3.

Sign in / Sign up

Export Citation Format

Share Document