Interface Traps Analysis in p-Type Poly-Si TFTs Under Hot Carrier Stress Using the Charge Pumping Method

2017 ◽  
Vol 17 (10) ◽  
pp. 7101-7106 ◽  
Author(s):  
Sangsub Kim ◽  
Pyungho Choi ◽  
Hyunki Kim ◽  
Soonkon Kim ◽  
Junyong Shin ◽  
...  
Keyword(s):  
Interface Traps ◽  
Charge Pumping ◽  
Hot Carrier ◽  
Hot Carrier Stress ◽  
P Type

Profiling of Channel-Hot-Carrier Stress-Induced Trap Distributions Along Channel and Gate Dielectric in High-$k$ Gated MOSFETs by a Modified Charge Pumping Technique

2014 ◽  
Vol 61 (4) ◽  
pp. 936-942 ◽  
Author(s):  
Chun-Chang Lu ◽  
Kuei-Shu Chang-Liao ◽  
Che-Hao Tsao ◽  
Tien-Ko Wang ◽  
Hsueh-Chao Ko ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Charge Pumping ◽  
Hot Carrier ◽  
High K ◽  
Hot Carrier Stress

Hot carrier stress degradation modes in p-type high voltage LDMOS transistors

2009 ◽  
Author(s):  
H. Enichlmair ◽  
J. M. Park ◽  
S. Carniello ◽  
B. Loeffler ◽  
R. Minixhofer ◽  
...  
Keyword(s):  
High Voltage ◽  
Hot Carrier ◽  
Hot Carrier Stress ◽  
Stress Degradation ◽  
P Type ◽  
Degradation Modes

Forward gated-diode method for extracting hot-carrier-stress-induced back interface traps in SOI/NMOSFETs

2002 ◽  
Vol 19 (3) ◽  
pp. 332-336
Author(s):  
Jin He ◽  
Xing Zhang ◽  
Ru Huang ◽  
Yangyuan Wang
Keyword(s):  
Interface Traps ◽  
Hot Carrier ◽  
Hot Carrier Stress

HOT CARRIER EFFECTS ON JITTER PERFORMANCE IN CMOS VOLTAGE-CONTROLLED OSCILLATORS

2006 ◽  
Vol 06 (03) ◽  
pp. L329-L334 ◽  
Author(s):  
CHI ZHANG ◽  
ASHOK SRIVASTAVA
Keyword(s):  
Threshold Voltage ◽  
Cmos Technology ◽  
Interface Traps ◽  
Voltage Controlled Oscillators ◽  
Hot Carrier ◽  
Hot Carrier Stress ◽  
Hot Carrier Effects ◽  
Voltage Degradation ◽  
Operation Frequency ◽  
Threshold Voltage Degradation

The effects of hot carrier stress on CMOS voltage-controlled oscillators (VCO) are investigated. A model of the threshold voltage degradation in MOSFETs due to hot carrier stress has been used to model jitter in voltage-controlled oscillators. The relation between the stress time which induces the hot carrier effects due to generation of interface traps near the drain of the n-MOSFETs, and the degradation of the VCO performance is presented. The VCO performance degradation takes into consideration decrease in operation frequency and increase in jitter. The experimental circuits have been designed in 0.5 μm n-well CMOS technology for operation at 3 V. Experimental results show that after four hours hot-carrier stress the jitter is increased by 40 ps for single-ended current starved VCOs.

HOT CARRIER STRESS INDUCED CHANGES IN MOST TRANSCONDUCTANCE STRUCTURE

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-779-C4-782 ◽  
Author(s):  
C. BERGONZONI ◽  
R. BENECCHI ◽  
P. CAPRARA
Keyword(s):  
Hot Carrier ◽  
Hot Carrier Stress ◽  
Induced Changes
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