scholarly journals A Review of Semiconductor Based Ionising Radiation Sensors Used in Harsh Radiation Environments and Their Applications

Radiation ◽  
2021 ◽  
Vol 1 (3) ◽  
pp. 194-217
Author(s):  
Arijit Karmakar ◽  
Jialei Wang ◽  
Jeffrey Prinzie ◽  
Valentijn De Smedt ◽  
Paul Leroux
Keyword(s):  
Integrated Circuits ◽  
High Energy Physics ◽  
Field Effect Transistors ◽  
Random Access ◽  
Absorbed Dose ◽  
High Energy ◽  
Ionising Radiation ◽  
Oxide Semiconductor ◽  
Nand Flash ◽  
Radiation Sensors

This article provides a review of semiconductor based ionising radiation sensors to measure accumulated dose and detect individual strikes of ionising particles. The measurement of ionising radiation (γ-ray, X-ray, high energy UV-ray and heavy ions, etc.) is essential in several critical reliability applications such as medical, aviation, space missions and high energy physics experiments considering safety and quality assurance. In the last few decades, numerous techniques based on semiconductor devices such as diodes, metal-oxide-semiconductor field-effect transistors (MOSFETs) and solid-state photomultipliers (SSPMs), etc., have been reported to estimate the absorbed dose of radiation with sensitivity varying by several orders of magnitude from μGy to MGy. In addition, the mitigation of soft errors in integrated circuits essentially requires detection of charged particle induced transients and digital bit-flips in storage elements. Depending on the particle energies, flux and the application requirements, several sensing solutions such as diodes, static random access memory (SRAM) and NAND flash, etc., are reported in the literature. This article goes through the evolution of radiation dosimeters and particle detectors implemented using semiconductor technologies and summarises the features with emphasis on their underlying principles and applications. In addition, this article performs a comparison of the different methodologies while mentioning their advantages and limitations.

Dual dielectric silicon metal‐oxide‐semiconductor field‐effect transistors as radiation sensors

1989 ◽  
Vol 65 (5) ◽  
pp. 1972-1976 ◽  
Author(s):  
R. C. Hughes ◽  
W. R. Dawes ◽  
W. J. Meyer ◽  
S. W. Yoon
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Radiation Sensors

Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Logic Synthesis ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Timing Models ◽  
High Temperature Operation

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.

Aligned, high-density semiconducting carbon nanotube arrays for high-performance electronics

Science ◽  
2020 ◽  
Vol 368 (6493) ◽  
pp. 850-856 ◽  
Author(s):  
Lijun Liu ◽  
Jie Han ◽  
Lin Xu ◽  
Jianshuo Zhou ◽  
Chenyi Zhao ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Nanotube Arrays ◽  
Carbon Nanotube Arrays ◽  
Cnt Arrays ◽  
Sorting Process ◽  
Walled Carbon Nanotubes ◽  
Scalable Production

Single-walled carbon nanotubes (CNTs) may enable the fabrication of integrated circuits smaller than 10 nanometers, but this would require scalable production of dense and electronically pure semiconducting nanotube arrays on wafers. We developed a multiple dispersion and sorting process that resulted in extremely high semiconducting purity and a dimension-limited self-alignment (DLSA) procedure for preparing well-aligned CNT arrays (within alignment of 9 degrees) with a tunable density of 100 to 200 CNTs per micrometer on a 10-centimeter silicon wafer. Top-gate field-effect transistors (FETs) fabricated on the CNT array show better performance than that of commercial silicon metal oxide–semiconductor FETs with similar gate length, in particular an on-state current of 1.3 milliamperes per micrometer and a recorded transconductance of 0.9 millisiemens per micrometer for a power supply of 1 volt, while maintaining a low room-temperature subthreshold swing of <90 millivolts per decade using an ionic-liquid gate. Batch-fabricated top-gate five-stage ring oscillators exhibited a highest maximum oscillating frequency of >8 gigahertz.

Fundamentals of SiC-Based Device Processing

MRS Bulletin ◽  
1997 ◽  
Vol 22 (3) ◽  
pp. 42-49 ◽  
Author(s):  
M.R. Melloch ◽  
J.A. Cooper ◽  
D.J. Larkin
Keyword(s):  
Integrated Circuits ◽  
Metal Oxide ◽  
Oxidation Rate ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Processing Technology ◽  
Oxide Semiconductor ◽  
Processing Technologies ◽  
Oxidation Rates ◽  
Polysilicon Gate

Since the commercial availability of SiC substrates in 1990, SiC processing technology has advanced rapidly. There have been demonstrations of monolithic digital and analogue integrated circuits, complementary metal-oxide-semiconductor (CMOS) analog integrated circuits, nonvolatile random-access memories, self-aligned polysilicon-gate metal-oxide-semiconductor field-effect transistors (MOSFETs), and buried-channel polysilicon-gate charge-coupled devices (CCDs). In this article, we review processing technologies for SiC.OxidationA beneficial feature of SiC processing technology is that SiC can be thermally oxidized to form SiO2. When a thermal oxide of thickness x is grown, 0.5x of the SiC surface is consumed, and the excess carbon leaves the sample as CO. Shown in Figure 1 are the oxide thicknesses as a function of time for the Si-face and the C-face of 6H-SiC, and for Si. The oxidation rates are considerably lower for SiC than for Si. The oxidation rate of the C-face of 6H-SiC is considerably greater than that of the Si-face. Hornetz et al. have shown that the reason for the slower oxidation rate of the Si-face is due to a 1-nm Si4C4−xO2 (x < 2) layer that forms between the SiC and the SiO2 during oxidation of the Si-face. When oxidizing the Si-face, the Si atoms oxidize first, which inhibits the oxidation of the underlying C atoms that are 0.063 nm below the Si atoms. When oxidizing the C-face, the C atoms readily oxidize first to form CO, with no formation of the Si4C4−xO2 layer for temperatures above 1000°C.

Change in Characteristics of SiC MOSFETs by Gamma-Ray Irradiation at High Temperature

2016 ◽  
Vol 858 ◽  
pp. 860-863 ◽  
Author(s):  
Takuma Matsuda ◽  
Takashi Yokoseki ◽  
Satoshi Mitomo ◽  
Koichi Murata ◽  
Takahiro Makino ◽  
...  
Keyword(s):  
Field Effect ◽  
Gamma Ray ◽  
Field Effect Transistors ◽  
Absorbed Dose ◽  
Drain Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Radiation Response ◽  
Electrical Characteristics ◽  
Gamma Ray Irradiation

Radiation response of 4H-SiC vertical power Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) was investigated at 150°C up to 10.4 MGy. Until irradiation at 1.2 MGy, the drain current – gate voltage curves of the SiC MOSFETs shifted to the negative voltage side, and the leakage of drain current at gate voltages below threshold voltage increased with increasing absorbed dose. However, no significant change in the electrical characteristics of SiC MOSFETs was observed at doses above 1.2 MGy. For blocking characteristics, there were no degradations of the SiC MOSFETs irradiated at 150°C even after irradiated at 10.4 MGy.

scholarly journals SEE Sensitivity Evaluation for Commercial 16 nm SRAM-FPGA

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1531 ◽  
Author(s):  
Chang Cai ◽  
Shuai Gao ◽  
Peixiong Zhao ◽  
Jian Yu ◽  
Kai Zhao ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Cross Sections ◽  
Radiation Effects ◽  
Large Scale ◽  
Random Access ◽  
Radiation Sensitivity ◽  
Heavy Ion ◽  
High Energy ◽  
Radiation Environment ◽  
Single Event

Radiation effects can induce severe and diverse soft errors in digital circuits and systems. A Xilinx commercial 16 nm FinFET static random-access memory (SRAM)-based field-programmable gate array (FPGA) was selected to evaluate the radiation sensitivity and promote the space application of FinFET ultra large-scale integrated circuits (ULSI). Picosecond pulsed laser and high energy heavy ions were employed for irradiation. Before the tests, SRAM-based configure RAMs (CRAMs) were initialized and configured. The 100% embedded block RAMs (BRAMs) were utilized based on the Vivado implementation of the compiled hardware description language. No hard error was observed in both the laser and heavy-ion test. The thresholds for laser-induced single event upset (SEU) were ~3.5 nJ, and the SEU cross-sections were correlated positively to the laser’s energy. Multi-bit upsets were measured in heavy-ion and high-energy laser irradiation. Moreover, latch-up and functional interrupt phenomena were common, especially in the heavy-ion tests. The single event effect results for the 16 nm FinFET process were significant, and some radiation tolerance strategies were required in a radiation environment.

Diamond Sensors and Vacuummicroelectronics

1995 ◽  
Vol 416 ◽  
Author(s):  
L. S. Pan
Keyword(s):  
High Energy Physics ◽  
High Energy ◽  
Great Promise ◽  
Physical Mechanisms ◽  
Silicon Devices ◽  
Vacuum Microelectronics ◽  
Diamondlike Carbon ◽  
Radiation Sensors ◽  
Physics Experiments ◽  
Energy Physics

ABSTRACTThis paper will cover two diverse electronic applications for which diamond devices have shown great promise. The first application is diamond radiation sensors for high radiation environments, where the competition is mainly silicon devices. These environments arise in high energy physics experiments, and tests show diamond to be superior to silicon in many ways. The second application is vacuum microelectronics, which generally refers to field emission, where the main competitor is metal and semiconductor microtip arrays. Certain diamond and diamondlike carbon materials emit electrons readily, but the physical mechanisms for this are not well understood. Negative electron affinity and other possible explanations are discussed in this paper.

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