Combined Reliability Testing Profile Model and Application for Embedded System

2013 ◽  
Vol 846-847 ◽  
pp. 587-591
Author(s):  
Jin Hui Wang ◽  
Jun Ai ◽  
Lin Zhi Huang
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Environmental Stress ◽  
Software Reliability ◽  
Stress Test ◽  
The State ◽  
Reliability Test ◽  
Reliability Testing ◽  
National Defense ◽  
Testing Method

Embedded system is applied more and more extensively in the fields of national defense weapon equipment. With the increasing complexity of embedded systems, the combination of the hardware with software is more and closer. Because of the overall characteristic of hardware and software combination in embedded system, traditional reliability test can hardly accurately identify the reliability of embedded systems. The proposed combined reliability testing method, which combines software reliability test with system integrated environmental stress test to simulate the state of system running, provides the basis for the accurate validation and evaluation of reliability of embedded system.

The Technology of Software Reliability Virtual Test Based on Software Conventional Failure Data

2013 ◽  
Vol 462-463 ◽  
pp. 1097-1101
Author(s):  
Jun Ai ◽  
Jing Wei Shang ◽  
Yang Liu
Keyword(s):  
Software Reliability ◽  
Failure Time ◽  
Reliability Test ◽  
Reliability Testing ◽  
Input Space ◽  
Software Failure ◽  
Data Matching ◽  
Failure Data ◽  
Testing Technology ◽  
Actual Use

The technology of software reliability quantitative assessment (SRQA) is based on failure data collected in software reliability test or actual use. However, software reliability testing is a long test cycle and difficult to collect enough failure data, which limits SRQA in the actual project. A large number of software failure found from the software growth test cant be used because the process has nothing to do with the actual use or no record of failure time. In this paper, software reliability virtual testing technology based on software conventional failure data is presented. According to the internal data association between input space of software reliability test and failure data found in conventional software testing, a data matching algorithm is proposed to obtain possible failure time in software reliability testing by matching conventional failure data and the input space. Finally, the imitate engine control software is used as the experimental subject to verify the feasibility and effectiveness of the method.

Compiler-Aided Run-Time Performance Speed-Up in Super-Scalar Processor

10.28945/3391 ◽  
2009 ◽  
Author(s):  
Moshe Pelleh
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
General Purpose ◽  
Experimental Results ◽  
Medium Size ◽  
Organic System ◽  
Software Application ◽  
Organic Systems ◽  
Special Cases ◽  
Run Time

In our world, where most systems become embedded systems, the approach of designing embedded systems is still frequently similar to the approach of designing organic systems (or not embedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Consequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dispatch, maintain and monitor the tasks and assist them in special cases (particularly communication and synchronization between them and with external devices). These OSs require an overhead on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes always the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complexity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental results.

scholarly journals A Novel Rail-Network Hardware Simulator for Embedded System Programming

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Learning Outcomes ◽  
Real World ◽  
Time Constraints ◽  
Network Simulator ◽  
Practical Applications ◽  
Rail Network ◽  
Knowledge Enhancement

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.

scholarly journals A Generalization Performance Study Using Deep Learning Networks in Embedded Systems

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1031
Author(s):  
Joseba Gorospe ◽  
Rubén Mulero ◽  
Olatz Arbelaitz ◽  
Javier Muguerza ◽  
Miguel Ángel Antón
Keyword(s):  
Deep Learning ◽  
Embedded Systems ◽  
Embedded System ◽  
General Purpose ◽  
Learning Networks ◽  
Performance Study ◽  
Learning Techniques ◽  
Wide Range ◽  
Learning Architectures

Deep learning techniques are being increasingly used in the scientific community as a consequence of the high computational capacity of current systems and the increase in the amount of data available as a result of the digitalisation of society in general and the industrial world in particular. In addition, the immersion of the field of edge computing, which focuses on integrating artificial intelligence as close as possible to the client, makes it possible to implement systems that act in real time without the need to transfer all of the data to centralised servers. The combination of these two concepts can lead to systems with the capacity to make correct decisions and act based on them immediately and in situ. Despite this, the low capacity of embedded systems greatly hinders this integration, so the possibility of being able to integrate them into a wide range of micro-controllers can be a great advantage. This paper contributes with the generation of an environment based on Mbed OS and TensorFlow Lite to be embedded in any general purpose embedded system, allowing the introduction of deep learning architectures. The experiments herein prove that the proposed system is competitive if compared to other commercial systems.

scholarly journals Singular Value Decomposition in Embedded Systems Based on ARM Cortex-M Architecture

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 34
Author(s):  
Michele Alessandrini ◽  
Giorgio Biagetti ◽  
Paolo Crippa ◽  
Laura Falaschetti ◽  
Lorenzo Manoni ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Singular Value Decomposition ◽  
Embedded System ◽  
Mimo Systems ◽  
Singular Value ◽  
Measurement Unit ◽  
Comprehensive Treatment ◽  
Mathematical Tool ◽  
Value Decomposition ◽  
Speed Accuracy

Singular value decomposition (SVD) is a central mathematical tool for several emerging applications in embedded systems, such as multiple-input multiple-output (MIMO) systems, data analytics, sparse representation of signals. Since SVD algorithms reduce to solve an eigenvalue problem, that is computationally expensive, both specific hardware solutions and parallel implementations have been proposed to overcome this bottleneck. However, as those solutions require additional hardware resources that are not in general available in embedded systems, optimized algorithms are demanded in this context. The aim of this paper is to present an efficient implementation of the SVD algorithm on ARM Cortex-M. To this end, we proceed to (i) present a comprehensive treatment of the most common algorithms for SVD, providing a fairly complete and deep overview of these algorithms, with a common notation, (ii) implement them on an ARM Cortex-M4F microcontroller, in order to develop a library suitable for embedded systems without an operating system, (iii) find, through a comparative study of the proposed SVD algorithms, the best implementation suitable for a low-resource bare-metal embedded system, (iv) show a practical application to Kalman filtering of an inertial measurement unit (IMU), as an example of how SVD can improve the accuracy of existing algorithms and of its usefulness on a such low-resources system. All these contributions can be used as guidelines for embedded system designers. Regarding the second point, the chosen algorithms have been implemented on ARM Cortex-M4F microcontrollers with very limited hardware resources with respect to more advanced CPUs. Several experiments have been conducted to select which algorithms guarantee the best performance in terms of speed, accuracy and energy consumption.

scholarly journals The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Line Drawing ◽  
Cmos Process ◽  
Embedded Processor ◽  
Processor Core ◽  
Field Programmable ◽  
The Embedded System ◽  
Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

Starpkulturālās komunikācijas nozīme visaptverošas valsts aizsardzības sistēmas veidošanā

2021 ◽  
pp. 238-245
Author(s):  
Uldis Zupa ◽  
Keyword(s):  
Turning Point ◽  
Essential Element ◽  
The State ◽  
Successful Implementation ◽  
National Defense ◽  
Defense System ◽  
State And Society ◽  
State Defense ◽  
The Relationship

The implementation of the comprehensive national defense system in Latvia marks a new turning point in the relationship between the state and society – instead of being consumers of the security and defense provided by the state, every inhabitant of Latvia must become an active contributor to the natio-nal defense system. Thus, the society’s willingness to defend the state becomes an essential element in the successful implementation of the comprehensive state defense system. This article analyzes the different views of Latvian and Russian-speaking population on issues that affect the willingness to defend the state, as well as evaluates the role of intercultural communication for informing public and increasing the involvement in the comprehensive national defense system.

scholarly journals Testing embedded systems using test cases generated through combinatorial techniques

2018 ◽  
Vol 7 (2.7) ◽  
pp. 146
Author(s):  
Lakshmi Prasad Mudarakola ◽  
J K.R. Sastry ◽  
V Chandra Prakash
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Traffic Control ◽  
Nuclear Reactor ◽  
Test Cases ◽  
Critical Systems ◽  
Daily Lives ◽  
Intelligent Devices ◽  
Wireless Infrastructure ◽  
Combinatorial Methods

Thorough testing of embedded systems is required especially when the systems are related to monitoring and controlling the mission critical and safety critical systems. The embedded systems must be tested comprehensively which include testing hardware, software and both together. Embedded systems are highly intelligent devices that are infiltrating our daily lives such as the mobile in your pocket, and wireless infrastructure behind it, routers, home theatre system, the air traffic control station etc. Software now makes up 90% of the value of these devices. In this paper, authors present different methods to test an embedded system using test cases generated through combinatorial techniques. The experimental results for testing a TMCNRS (Temperature Monitoring and Controlling Nuclear Reactor System) using test cases generated from combinatorial methods are also shown.

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