TSPEM Parameter Extraction Method and Its Applications in the Modeling of Planar Schottky Diode in THz Band

In this paper, a new method for the parameter extraction of Schottky barrier diode (SBD) is presented to eliminate the influence of parasitic parameters on the intrinsic capacitance-voltage (C-V) characteristics of the Schottky diodes at high frequencies. The method is divided into the de-embedding and parameter extraction, including six auxiliary configurations and, is referred tos as Two-step Six-configuration Parameter Extraction Method (TSPEM). Compared to the traditional junction capacitance extraction method, this method can extract the value of junction capacitance at higher frequencies with higher accuracy. At the same time, compared to the other de-embedding methods, this method shows better performance in de-embedding the contributions of parasitic structures from the transmission line measurements. The intrinsic junction capacitances obtained by this method and the three-dimensional (3-D) electromagnetic model are combined to form a diode simulation model, which accurately characterizes the capacitance characteristics of the SBD. It was verified with a 200 GHz double frequency multiplier, and the simulation results and measurement results showed good consistency.

Analyzing the Effect of Parasitic Capacitance in a Full-Bridge Class-D Current Source Rectifier on a High Step-Up Push–Pull Multiresonant Converter

This paper presents an analysis on the effect of a parasitic capacitance full-bridge class-D current source rectifier (FB-CDCSR) on a high step-up push–pull multiresonant converter (HSPPMRC). The proposed converter can provide high voltage for a 12 VDC battery using an isolated transformer and an FB-CDCSR. The main switches of the push–pull and diode full-bridge rectifier can be operated under a zero-current switching condition (ZCS). The advantages of this technique are that it uses a leakage inductance to achieve the ZCS for the power switch, and the leakage inductance and parasitic junction capacitance are used to design the secondary side of the resonant circuit. A prototype HSPPMRC was built and operated at 200 kHz fixed switching frequency, 340 VDC output voltage, and 250 W output power. In addition, the efficiency is equal to 96% at maximum load. Analysis of the effect of the parasitic junction capacitance on the full-bridge rectifier indicates that it has a significant impact on the operating point of the resonant tank and voltage. The proposed circuit design was verified via experimental results, which were found to be in agreement with the theoretical analysis.

Analysis of junction capacitance characteristics of trench gate IGBT

Trench gate field termination IGBT represents the latest structure of insulated gate bipolar transistor (IGBT). Because the internal current of IGBT includes the charging and discharging current of gate capacitance and internal junction capacitance during switching transient, the influence of junction capacitance should be considered. The conductive channel of trench gate structure is different from that of planar gate structure, and the analysis method of junction capacitance using planar gate structure will inevitably bring some deviation. Based on the characteristics of trench gate structure, this paper analyzes the different expressions of internal gate-drain junction capacitance in two cases according to whether the base depletion layer can be widened to cover the trench gate, and finally carries out simulation and experimental verification.