Optimization Technique for High-Gain CMOS Power Amplifier for 5G Applications

In this study, a differential power amplifier (PA) with a high gain of over 30 dB by configuring a three-stage common source unit amplifier was designed. To ensure the stability of the high-gain differential PA, the analysis to apply the capacitive neutralization method to the differential common source PA was conducted. From the analysis, the required neutralized capacitance was quantitatively calculated from the estimated parasitic components of a power cell used in the PA. To verify the feasibility of the proposed optimization technique, a Ka-band PA was designed with a 65 nm RFCMOS process. The measurement results showed a gain of 30.7 dB. The saturated output power was measured as 16.1 dBm, maximum power-added efficiency (PAE) was 29.7%, and P1dB was 13.1 dBm.

Optimisation of a Pump-Controlled Hydraulic System using Digital Displacement Pumps

When electrifying working machines, energy-efficient operation is key to maximise the use of the limited capacity of on-board batteries. Previous research indicate high energy savings by means of component and system design. In contrast, this paper focuses on how to maximise energy efficiency by means of both design and control optimisation. Simulation-based optimisation and dynamic programming are used to find the optimal electric motor speed trajectory and component sizes for a scooptram machine equipped with pump control, enabled by digital displacement pumps with dynamic flow sharing. The results show that a hardware configuration and control strategy that enable low pump speed minimise drag losses from parasitic components, partly facilitated by the relatively high and operation point-independent efficiencies of the pumps and electric motor. 5–10% cycle energy reductions are indicated, where the higher figure was obtained for simultaneous design and control optimisation. For other, more hydraulic-intense applications, such as excavators, greater reductions could be expected.

Tissue/Biofluid Specific Molecular Cartography of Leishmania donovani Infected BALB/c Mice: Deciphering Systemic Reprogramming

Pathophysiology of visceral leishmaniasis (VL) is not fully understood and it has been widely accepted that the parasitic components and host immune response both contribute to the perpetuation of the disease. Host alterations during leishmaniasis is a feebly touched area that needs to be explored more to better understand the VL prognosis and diagnosis, which are vital to reduce mortality and post-infection sequelae. To address this, we performed untargeted metabolomics of Leishmania donovani (Ld) infected, uninfected and treated BALB/c mice’s tissues and biofluids to elucidate the host metabolome changes using gas chromatography–mass spectrometry. Univariate and multivariate data treatments provided numerous significant differential hits in several tissues like the brain, liver, spleen and bone marrow. Differential modulations were also observed in serum, urine and fecal samples of Ld-infected mice, which could be further targeted for biomarker and diagnostic validations. Several metabolic pathways were found to be upregulated/downregulated in infected (TCA, glycolysis, fatty acids, purine and pyrimidine, etcetera) and treated (arginine, fumaric acid, orotic acid, choline succinate, etcetera) samples. Results also illustrated several metabolites with different pattern of modulations in control, infected and treated samples as well as in different tissues/biofluids; for e.g. glutamic acid identified in the serum samples of infected mice. Identified metabolites include a range of amino acids, saccharides, energy-related molecules, etcetera. Furthermore, potential biomarkers have been identified in various tissues—arginine and fumaric acid in brain, choline in liver, 9-(10) EpOME in spleen and bone marrow, N-acetyl putrescine in bone marrow, etcetera. Among biofluids, glutamic acid in serum, hydrazine and deoxyribose in urine and 3-Methyl-2-oxo pentanoic acid in feces are some of the potential biomarkers identified. These metabolites could be further looked into for their role in disease complexity or as a prognostic marker. The presented profiling approach allowed us to attain a metabolic portrait of the individual tissue/biofluid modulations during VL in the host and represent a valuable system readout for further studies. Our outcomes provide an improved understanding of perturbations of the host metabolome interface during VL, including identification of many possible potential diagnostic and therapeutic targets.

High Power Density, High-Voltage Parallel Resonant Converter Using Parasitic Capacitance on the Secondary Side of a Transformer

High-voltage DC power supplies are used in several applications, including X-ray, plasma, electrostatic precipitator, and capacitor charging. However, such a high-voltage power supply has problems, such as a decrease in reliability, owing to an increase in output ripple voltage, and a decrease in power density, owing to an increase in volume. Therefore, this study proposes a method for improving the power density of a parallel resonant converter using the parasitic capacitor of the secondary side of the transformer. Due to the fact that high-voltage power supplies have many turns on the secondary side, a significant number of parasitic capacitors are generated. In addition, in the case of a parallel resonant converter, because the transformer and the primary resonant capacitor are connected in parallel, the parasitic capacitor component generated on the secondary side of the transformer can be equalized and used. A parallel cap-less resonant converter structure developed using the parasitic components of such transformers is proposed. Primary side and secondary side equivalent model analyses are conducted in order to derive new equations and gain waveforms. Finally, the validity of the proposed structure is verified experimentally.

A New Tunable SISO Filter Designed in 40nm CMOS for Bilateral Inverse and Buffer Filtering Applications

A new study imitating the design and implementation of single-input–single-output (SISO) filters as bilateral filters has been presented in this paper. Second generation current controlled current conveyor (CCCII), being a popular low power active element was considered for the realization of the proposed design. Complete design, analysis and implementation of the voltage mode SISO filter was done using only two CCCII’s and two passive parasitic components. The striking feature of this work is that the proposed design can be made to work at either the input node or the output node, as well as in the cases; the change of direction changes the filter into an inverse filter and buffer filter. Basic filter applications like low-pass, high-pass, band-pass and band-stop were aimed to check the uniformity of the proposed design at different frequencies. Results perceived from the simulation study were fare enough on both the side nodes of the proposed design. Categorically, the circuit can be aimed to work in lieu of a filter transceiver. The consistency of the circuit was analyzed by the nodal analysis. Whereas the working performance was enormously analyzed and evaluated during the simulation analysis. The proposed design was simulated in HSPICE tool to exhibit and exploit the delivery, using the 45[Formula: see text]nm predictive technology model (PTM) parameters, with [Formula: see text][Formula: see text]V rail to rail voltages. Maximum power consumption of the circuit is around 138.5[Formula: see text][Formula: see text]W. Finally, the design was also implemented in Cadence Virtuoso using 40[Formula: see text]nm SMIC parameters.

Enhancement Mode GaN-FETs in Extreme Temperature Conditions, Part I: Static Parasitic Parameters

Smaller packaging and sizing of power electronics and higher operating temperatures of switching devices call for an analysis and verification on the impact of the parasitic components in these devices. Found drift mechanisms in an eGaN-FET are studied by literature and related to measurements performed in extreme temeprature conditions far beyond the manufacturer recommended operating range. A thermal chamber was build to precisely measure the effect of temperature in these devices using a curve tracer. It is found that the increment in RDSon, IDSS, IGSS and VSD can be justified by the theory and backed up by measurements. It is also found that the particular eGaN-FET can be suited for extreme temperature operating conditions.

Suppressing Voltage Spikes of MOSFET in H-Bridge Inverter Circuit

Power electronics devices are made from semiconductor switches such as thyristors, MOSFETs, and diodes, along with passive elements of inductors, capacitors, and resistors, and integrated circuits. They are heavily used in power processing for applications in computing, communication, medical electronics, appliance control, and as converters in high power DC and AC transmission in what is now called harmonized AC/DC networks. A converter’s operation is described as a periodic sequencing of different modes of operation corresponding to different topologies interfaced to filters made of passive elements. The performance of converters has improved considerably using high switching frequency, which leads to a significant improvement in a power converter’s performance. However, the high dv/dt through a fast-switching transient of the MOSFET is associated with parasitic components generating oscillations and voltage spikes having adverse effects on the operation of complementary switches, thereby affecting the safe operation of the power devices. In this paper, the MOSFET gate-driver circuit performance is improved to suppress the H-Bridge inverter’s voltage spikes. The proposed technique is a simple improvement to the gate driver based on the IR2112 driver (IC) by adding a capacitor to attenuate the effect of parasitic components and the freewheeling current, suppressing the negative voltage spikes. This paper’s main contribution is to improve the gate driver circuit’s capability for suppressing the voltage spikes in the H-Bridge inverter. The improved gate driver circuit is validated experimentally and is compared with the conventional gate driver. The experimental results show that the proposed technique can effectively suppress the MOSFET’s voltage spikes and oscillations.

Research of Methods for Suppression of Parasitic Components in RF Quadrature Modulator Output Signal Spectrum

The quadrature modulators and demodulators are widely used to create modern wireless communication systems. It is important to ensure high quality of the transmitted signals in order to have the exchange of information without loss or failure. From the point of view of the spectral decomposition of the signal (Fourier series decomposition), the useful component of the spectrum must be much larger than all other components. The carrier (LO frequency and spurious sideband are the most critical and undesirable quadrature modulator output signal spectral components. In the work, in the course of the research using the methods of suppressing the parasitic components, based on minimizing phase, amplitude and current imbalances in various nodes of the quadrature modulator circuit, have been revealed. In order to realize suppression, the special digital-to-analog converters are used in conjunction with a polyphase filter on varicaps, a phase-shifting block and current sources. The effectiveness of these methods is confirmed by the achievement of suppression of parasitic components in prototypes of 50 dB or more. It has been stated that the phase unbalance minimization is more effective than the amplitude unbalance minimization to sideband suppression. It has been revealed that the use of a phase-shifting block is a more suitable architecture to control the phase unbalance. The obtained results can be useful in the design of high-precision radio frequency units for various purposes.