Improving Switching Characteristics of 4H-SiC Junction Rectifiers Using Epitaxial and Implanted Anodes with Epitaxial Refill

2006 ◽  
Vol 527-529 ◽  
pp. 1363-1366
Author(s):  
Peter A. Losee ◽  
Can Hua Li ◽  
R.J. Kumar ◽  
T. Paul Chow ◽  
I. Bhat ◽  
...  

The on-state and switching performance of high voltage 4H-SiC junction rectifiers are compared using numerical simulations and experimental characterization. Epitaxial and implanted anode PiN diodes as well as novel, advanced rectifiers have been fabricated in 4H-SiC using 110μm thick drift layers. The relatively low forward voltage drop of these epi-anode diodes (4.2V @ 100A/cm2) indicates moderate conductivity modulation, while the superior switching performance of the “MPS-like” rectifiers is demonstrated with reverse recovery characteristics at various temperatures and forward current densities.

2012 ◽  
Vol 717-720 ◽  
pp. 981-984 ◽  
Author(s):  
Eugene A. Imhoff ◽  
Karl D. Hobart ◽  
Francis J. Kub ◽  
M.G. Ancona ◽  
Rachael L. Myers-Ward ◽  
...  

Integration of patterned ballast resistance into the anode of SiC PiNs is a solution to the dilemma of negative dVf /dT for such diodes. In fabricated 4H-SiC PiN diodes, we demonstrate a cross-over from negative to positive temperature coefficient for current densities as low as 80 A/cm2. Adjusting the percentage of the patterned anode area, the positive or neutral dVf /dT can be achieved over a wide current-density range without substantial penalty in the forward voltage drop. This characteristic is crucial for high-power SiC packages with ganged-parallel rectifier arrays.


Energies ◽  
2019 ◽  
Vol 12 (23) ◽  
pp. 4566 ◽  
Author(s):  
Asllani ◽  
Morel ◽  
Phung ◽  
Planson

This paper presents the design, fabrication and characterization results obtained on the last generation (third run) of SiC 10 kV PiN diodes from SuperGrid Institute. In forward bias, the 59 mm2 diodes were tested up to 100 A. These devices withstand voltages up to 12 kV on wafer (before dicing, packaging) and show a low forward voltage drop at 80 A. The influence of the temperature from 25 °C to 125 °C has been assessed and shows that resistivity modulation occurs in the whole temperature range. Leakage current at 3 kV increases with temperature, while being three orders of magnitude lower than those of equivalent Si diodes. Double-pulse switching tests reveal the 10 kV SiC PiN diode’s outstanding performance. Turn-on dV/dt and di/dt are −32 V/ns and 311 A/µs, respectively, whereas turn-off dV/dt and di/dt are 474 V/ns and −4.2 A/ns.


2014 ◽  
Vol 778-780 ◽  
pp. 855-858 ◽  
Author(s):  
Dai Okamoto ◽  
Yasunori Tanaka ◽  
Tomonori Mizushima ◽  
Mitsuru Yoshikawa ◽  
Hiroyuki Fujisawa ◽  
...  

We successfully fabricated 13-kV, 20-A, 8 mm × 8 mm, drift-free 4H-SiC PiN diodes. The fabricated diodes exhibited breakdown voltages that exceeded 13 kV, a forward voltage drop of 4.9–5.3 V, and an on-resistance (RonAactive) of 12 mW·cm2. The blocking yield at 10 kV on a 3-in wafer exceeded 90%. We investigated failed devices using Candela defect maps and light-emission images and found that a few devices failed because of large defects on the chip. We also demonstrated that the fabricated diodes can be used in conducting high-voltage and high-current switching tests.


2018 ◽  
Vol 924 ◽  
pp. 568-572 ◽  
Author(s):  
Arash Salemi ◽  
Hossein Elahipanah ◽  
Carl Mikael Zetterling ◽  
Mikael Östling

Implantation-free mesa etched ultra-high-voltage 4H-SiC PiN diodes are fabricated, measured and analyzed by device simulation. The diode’s design allows a high breakdown voltage of about 19.3 kV according to simulations. No reverse breakdown is observed up to 13 kV with a very low leakage current of 0.1 μA. A forward voltage drop (VF) and differential on-resistance (Diff. Ron) of 9.1 V and 41.4 mΩ cm2are measured at 100 A/cm2, respectively, indicating the effect of conductivity modulation.


2012 ◽  
Vol 717-720 ◽  
pp. 953-956 ◽  
Author(s):  
Alex V. Bolotnikov ◽  
Peter A. Losee ◽  
Kevin Matocha ◽  
Jeff Nasadoski ◽  
John Glaser ◽  
...  

This paper presents a study of performance and scalability of 8kV SiC PIN diodes focusing on area-dependent yield and sensitivity to material properties variation. Successfully fabricated 18 and 36 mm2 SiC-PiN diodes exhibited avalanche breakdown above 8 kV and < 5V forward voltage drop at 100 A/cm2 current density. The fast switching operation of these diodes up to ~5 kHz frequency is evidenced by reverse recovery measurements with by double-pulse inductive switching tests. The devices exhibit 0.142 and 0.169 uC/cm2 stored charge at room temperature and 125oC, respectively, when turned-off from Jf = 100A/cm2 to Vr = 2.1 kV. The measured diode breakdown voltage exhibited location and size dependent yield, indicating the necessity of material quality improvements for production.


2010 ◽  
Vol 645-648 ◽  
pp. 905-908 ◽  
Author(s):  
Gil Yong Chung ◽  
Mark J. Loboda ◽  
Siddarth G. Sundaresan ◽  
Ranbir Singh

Correlation between carrier lifetime and forward voltage drop in 4H-SiC PiN diodes has been investigated. PiN diodes from the drift layer of 20 m shows breakdown voltage of 3.3 kV and forward voltage drop as low as 3.13 V at 100A/cm2. Variation of calculated forward voltage drop ( ) from measured carrier lifetimes is very comparable to measured of fully processed PiN diodes. Measured carrier lifetime and of PiN diodes also show good spatial correlation. Wafer level lifetime mapping can be employed to assess and predict of PiN diodes.


2002 ◽  
Vol 742 ◽  
Author(s):  
Stephen Van Campen ◽  
Andris Ezis ◽  
John Zingaro ◽  
Garrett Storaska ◽  
R. Chris Clarke ◽  
...  

ABSTRACTHigh Power asymmetric SiC GTOs (Gate Turn-Off Thyristors) were fabricated on n-type 4H-SiC substrates with multiple epi-layers and were tested to investigate breakdown voltage, maximum current density, switching characteristics, and temperature dependences.Comparison of breakdown voltages achieved by GTOs with Guard Ring edge termination and GTOs with a proprietary Junction Termination Extension (JTE) fabricated on the same wafer are made. Individual GTOs with a nominal area of 4 mm2 (2 mm × 2 mm) utilizing the JTE were tested in forward bias and found to support over 6 kV at leakage currents of less than 5 μA. In addition, GTOs with a nominal area of 0.25 mm2 (0.5 mm × 0.5 mm) utilizing the JTE were found to support over 7 kV. These blocking voltages are the highest reported for GTOs in SiC. [1–5] Wafer maps of the breakdown voltages for older and newer wafers suggest an improvement of the material. The defect density for the newer wafer is estimated to be greater than the micropipe density.The on-state characteristics are equally impressive, with 4 mm2 GTOs carrying > 1000 A/cm2. The GTO has a forward voltage drop of 3.66 V at a current density of 300 A/cm2 at room temperature and a forward voltage drop of 3.1 V at 300 A/cm2 at 224 °C. This indicates that on-state losses should not be excessive, even at high current densities and high temperatures.


2013 ◽  
Vol 740-742 ◽  
pp. 895-898 ◽  
Author(s):  
Lin Cheng ◽  
Anant K. Agarwal ◽  
Michael J. O'Loughlin ◽  
Craig Capell ◽  
Khiem Lam ◽  
...  

In this work, we report our recently developed 16 kV, 1 cm2, 4H-SiC PiN diode results. The SiC PiN diode was built on a 120 µm, 2×1014/cm3 doped n-type SiC drift layer with a device active area of 0.5175 cm2. Forward conduction of the PiN diode was characterized at temperatures from 20°C to 200°C. At high injection-current density (JF) of 350 ~ 400 A/cm2, the differential on-resistance (RON,diff) of the SiC PiN diode decreased from 6.08 mΩ·cm2 at 20°C to 5.12 mΩ·cm2 at 200°C, resulting in a very small average temperature coefficient of –5.33 µΩ·cm2/°C, while the forward voltage drop (VF) at 100 A/cm2 reduced from 4.77 V at 20°C to 4.17 V at 200°C. This is due to an increasing high-level carrier lifetime with an increase in temperature, resulting in reduced forward voltage drop. We also observed lower RON,diff at higher injection-current densities, suggesting that a higher carrier lifetime is needed in this lightly doped n-type SiC thick epi-layer in order to achieve full conductivity modulation. The anode to cathode reverse blocking leakage current was measured as 0.9 µA at 16 kV at room temperature.


2006 ◽  
Vol 527-529 ◽  
pp. 243-246 ◽  
Author(s):  
Ze Hong Zhang ◽  
Tangali S. Sudarshan

A method was developed in our laboratory to grow low basal plane dislocation (BPD) density and BPD-free SiC epilayers. The key approach is to subject the SiC substrates to defect preferential etching, followed by conventional epitaxial growth. It was found that the creation of BPD etch pits on the substrates can greatly enhance the conversion of BPDs to threading edge dislocations (TEDs) during epitaxy, and thus low BPD density and BPD-free SiC epilayers are obtained. The reason why BPD etch pits can promote the above conversion is discussed. The SiC epilayer growth by this method is very promising in overcoming forward voltage drop degradation of SiC PiN diodes.


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