Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects
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Modeling of On-Chip Transmission Lines in High-Speed A&MS Design - The Low Frequency Inductance Calculation

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258319 ◽

2002 ◽

Cited By ~ 7

Author(s):

Rachel Gordin ◽

David Goren ◽

Michael Zelikson

Keyword(s):

Transmission Lines ◽

High Speed ◽

Low Frequency ◽

On Chip

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Imperfect Return Path Effects on RLCG Model of Single and Coupled Interconnects: Propagation delay, Rise Time and Crosstalk Prediction

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258279 ◽

2002 ◽

Cited By ~ 1

Author(s):

J.F. Legier ◽

E. Paleczny ◽

K. Bouazzati ◽

D. Deschachi ◽

F. Huret

Keyword(s):

Rise Time ◽

Propagation Delay ◽

Return Path

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A numerical tool for the analysis of the effects of conductor losses on interconnect structures

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258293 ◽

2002 ◽

Cited By ~ 1

Author(s):

A. Maffucci ◽

G. Miano ◽

G. Rubinacci ◽

F. Villone

Keyword(s):

Numerical Tool

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LFSR Test Pattern Crosstalk in Nanometer Technologies

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258315 ◽

2002 ◽

Cited By ~ 1

Author(s):

Dieter Treytnar ◽

Michael Redeker ◽

Hartmut Grabinski ◽

F.M. Ktata

Keyword(s):

Test Pattern

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Full-Chip Inductance Modeling and Simulation: Breaking the Complexity not Accuracy Bottleneck

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258296 ◽

2002 ◽

Author(s):

Eli Chiprout

Keyword(s):

Modeling And Simulation

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Study of copper diffusion into tantalum nitride (Ta/sub 2/N) by rapid thermal annealing (RTA)

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258309 ◽

2002 ◽

Author(s):

S. Loh ◽

D. Zhang ◽

R. Liu ◽

C. Li ◽

A. S. Wee

Keyword(s):

Thermal Annealing ◽

Rapid Thermal Annealing ◽

Tantalum Nitride ◽

Copper Diffusion

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Simulation of Reduction Properties of Radiated Emission by On-chip Decoupling Capacitor

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258278 ◽

2002 ◽

Cited By ~ 2

Author(s):

Toshio Sudo ◽

Manabu Bonkohara

Keyword(s):

Decoupling Capacitor ◽

On Chip ◽

Radiated Emission

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System-On-a-Package Technologies for Enabling Future Microsystems

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258277 ◽

2002 ◽

Author(s):

Madhavan Swaminath

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The Improvement of Signal Integrity (SI) according to The Location of Via in The Vicinity of A Slot in The Reference Plane

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258311 ◽

2002 ◽

Author(s):

Tae Lee ◽

Junho Kim ◽

Hyungsoo Kim ◽

Pil Jun ◽

Joungho Kim

Keyword(s):

Signal Integrity ◽

Reference Plane

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Modeling Of Electromagnetic Waves Incident On Integrated Circuit

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects ◽

10.1109/spi.2002.258292 ◽

2002 ◽

Author(s):

W. Bandurski

Keyword(s):

Integrated Circuit ◽

Electromagnetic Waves

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Proceedings: 6th IEEE Workshop on Signal Propagation on InterconnectsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Modeling of On-Chip Transmission Lines in High-Speed A&MS Design - The Low Frequency Inductance Calculation

Imperfect Return Path Effects on RLCG Model of Single and Coupled Interconnects: Propagation delay, Rise Time and Crosstalk Prediction

A numerical tool for the analysis of the effects of conductor losses on interconnect structures

LFSR Test Pattern Crosstalk in Nanometer Technologies

Full-Chip Inductance Modeling and Simulation: Breaking the Complexity not Accuracy Bottleneck

Study of copper diffusion into tantalum nitride (Ta/sub 2/N) by rapid thermal annealing (RTA)

Simulation of Reduction Properties of Radiated Emission by On-chip Decoupling Capacitor

System-On-a-Package Technologies for Enabling Future Microsystems

The Improvement of Signal Integrity (SI) according to The Location of Via in The Vicinity of A Slot in The Reference Plane

Modeling Of Electromagnetic Waves Incident On Integrated Circuit

Proceedings: 6th IEEE Workshop on Signal Propagation on Interconnects
Latest Publications