With the development of digital signal processing and advanced algorithms, real-time signal processing based on FPGA and DSP is suitable for high-speed radar signal processing. With the rapid development of science and technology, war has entered the information age guided by high technology, and advanced science and technology has played a vital role in the trend of war. In recent years in the modern war, many countries invest a lot of research effort on the stealth technology, and advanced stealth technology can use a variety of technical means to alter or weaken the feature information of the target, confuse the enemy radar detection system effectively, reduce the chance of being detected to the largest extent, and prolong the lifecycle of aircraft and weapons. This research mainly discusses the electromagnetic occlusion algorithm and its optimization based on FPGA and panel grouping. The FPGA model selected for this study is XC6VLX240T-1FF1156I. Because the amount of data processed here is not very large, the cache part directly uses the on-chip storage resources of the FPGA, and the AD device is used to perform analog-to-digital/digital-to-analog conversion on the signal and perform digital up-down conversion. For a facet, it is necessary to first verify whether it is a bright facet and set the flag to mark it, then the facet needs to be occluded with the triangular facet marked as a bright facet, and all bright facets that have been marked need to be traversed. Open MP parallelization of the occlusion algorithm is as follows: The physical optics method is used to calculate the target RCS, and the focus of parallelism is placed on the part with a large amount of calculation. When using Open MP to design a program on a multicore computer, each group is assigned a thread to give full play to the core computing power. The total field is scattered and superimposed by each surface element. This part uses the parallel processing mode of Open MP, which allows the panel judgment in the group to be carried out at the same time. This part requires schedule to allocate resources and use different parallel mechanisms for different calculations to optimize debugging. In the angular range where there is multiple scattering at
0
°
≤
φ
≤
90
°
, the calculation results and the measurement results are in good agreement, and when the two planes are simulated with 1820 triangular faces, the fast multiple scattering in this paper only needs 4 minutes. This research has realized the general radar signal processing method based on FPGA structure, and the design has important engineering realization significance.